Inventor · disambiguated record
Louis D. Lanzerotti
Also filed as: LANZEROTTI LOUIS · LANZEROTTI LOUIS D · LANZEROTTI LOUIS DEWOLF
33 granted patents·5 pending applications·1,123 citations·filing 1993–2018
98Inventor score
Top patents by PatentIndex Score
38 records- 0199US6849884B2Strained Fin FETs structure and methodIBM·Filed 2003·Granted Feb 1, 2005·228 cites·18 claims
- 0299US6635909B2Strained fin FETs structure and methodIBM·Filed 2002·Granted Oct 21, 2003·237 cites·18 claims
- 0396US6767793B2Strained fin FETs structure and methodIBM·Filed 2003·Granted Jul 27, 2004·90 cites·18 claims
- 0495US6900519B2Diffused extrinsic base and method for fabricationIBM·Filed 2004·Granted May 31, 2005·95 cites·17 claims
- 0592US6774000B2Method of manufacture of MOSFET device with in-situ doped, raised source and drain structuresIBM·Filed 2002·Granted Aug 10, 2004·56 cites·17 claims
- 0689US7303968B2Semiconductor device and method having multiple subcollectors formed on a common waferIBM·Filed 2005·Granted Dec 4, 2007·13 cites·4 claims
- 0789US6858532B2Low defect pre-emitter and pre-base oxide etch for bipolar transistors and related toolingIBM·Filed 2002·Granted Feb 22, 2005·44 cites·19 claims
- 0888US6600199B2Deep trench-buried layer array and integrated device structures for noise isolation and latch up immunityIBM·Filed 2000·Granted Jul 29, 2003·51 cites·14 claims
- 0987US7956412B2Lateral diffusion field effect transistor with a trench field plateIBM·Filed 2007·Granted Jun 7, 2011·14 cites·14 claims
- 1086US7329940B2Semiconductor structure and method of manufactureIBM·Filed 2005·Granted Feb 12, 2008·10 cites·24 claims
- 1186US7078722B2NFET and PFET devices and methods of fabricating sameIBM·Filed 2004·Granted Jul 18, 2006·31 cites·18 claims
- 1286US6670654B2Silicon germanium heterojunction bipolar transistor with carbon incorporationIBM·Filed 2002·Granted Dec 30, 2003·34 cites·20 claims
- 1386US6426265B1Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technologyIBM·Filed 2001·Granted Jul 30, 2002·25 cites·23 claims
- 1484US6812545B2Epitaxial base bipolar transistor with raised extrinsic baseIBM·Filed 2003·Granted Nov 2, 2004·28 cites·7 claims
- 1583US6858903B2MOSFET device with in-situ doped, raised source and drain structuresIBM·Filed 2004·Granted Feb 22, 2005·24 cites·21 claims
- 1683US6656815B2Process for implanting a deep subcollector with self-aligned photo registration marksIBM·Filed 2001·Granted Dec 2, 2003·35 cites·22 claims
- 1782US7485965B2Through via in ultra high resistivity wafer and related methodsIBM·Filed 2007·Granted Feb 3, 2009·10 cites·9 claims
- 1882US7202136B2Silicon germanium heterojunction bipolar transistor with carbon incorporationIBM·Filed 2005·Granted Apr 10, 2007·8 cites·6 claims
- 1975US7064416B2Semiconductor device and method having multiple subcollectors formed on a common waferIBM·Filed 2001·Granted Jun 20, 2006·16 cites·2 claims
- 2074US7550787B2Varied impurity profile region formation for varying breakdown voltage of devicesIBM·Filed 2005·Granted Jun 23, 2009·4 cites·6 claims
- 2172US6617220B2Method for fabricating an epitaxial base bipolar transistor with raised extrinsic baseIBM·Filed 2001·Granted Sep 9, 2003·15 cites·13 claims
- 2270US5351261AIntegrated opticsAT & T BELL LAB·Filed 1993·Granted Sep 27, 1994·26 cites·23 claims
- 2367US6441462B1Self-aligned SiGe NPN with improved ESD robustness using wide emitter polysilicon extensionIBM·Filed 2001·Granted Aug 27, 2002·13 cites·18 claims
- 2466US7713829B2Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technologyIBM·Filed 2006·Granted May 11, 2010·1 cites·14 claims
- 2563US7491614B2Methods for forming channel stop for deep trench isolation prior to deep trench etchIBM·Filed 2005·Granted Feb 17, 2009·2 cites·14 claims
- 2660US6815802B2Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technologyIBM·Filed 2002·Granted Nov 9, 2004·5 cites·5 claims
- 2754US6869854B2Diffused extrinsic base and method for fabricationIBM·Filed 2002·Granted Mar 22, 2005·5 cites·29 claims
- 2852US8030167B2Varied impurity profile region formation for varying breakdown voltage of devicesIBM·Filed 2007·Granted Oct 4, 2011·0 cites·19 claims
- 2952US8022496B2Semiconductor structure and method of manufactureIBM·Filed 2007·Granted Sep 20, 2011·0 cites·25 claims
- 3051US2009057815A1Forming channel stop for deep trench isolation prior to deep trench etchLANZEROTTI LOUIS D·Filed 2008·Application pending·0 cites
- 3149US7138669B2Silicon germanium heterojunction bipolar transistor with carbon incorporationIBM·Filed 2003·Granted Nov 21, 2006·3 cites·15 claims
- 3246US7374988B2NFET and PFET devices and methods of fabricating sameIBM·Filed 2006·Granted May 20, 2008·0 cites·24 claims
- 3346US7173274B2Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technologyIBM·Filed 2004·Granted Feb 6, 2007·0 cites·10 claims
- 3443US11417525B2Multiple patterning with mandrel cuts defined by block masksGLOBALFOUNDRIES US INC·Filed 2018·Granted Aug 16, 2022·0 cites·8 claims
- 3541US2006234484A1Method and structure for ion implantation by ion scatteringIBM·Filed 2005·Application pending·0 cites
- 3639US2007205430A1Method and structure of refractory metal reach through in bipolar transistorCOLLINS DAVID S·Filed 2006·Application pending·0 cites
- 3735US2002175413A1Method for utilizing tungsten barrier in contacts to silicide and structure produced therbyIBM·Filed 2001·Application pending·0 cites
- 3834US2002197807A1Non-self-aligned SiGe heterojunction bipolar transistorIBM·Filed 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →