Forming channel stop for deep trench isolation prior to deep trench etch

Abstract

Methods of manufacturing a semiconductor structure are disclosed including a deep trench isolation in which a channel stop is formed in the form of an embedded impurity region in the substrate prior to the deep trench etch and formation of transistor devices (FEOL processing) on the substrate. In this fashion, the FEOL processing thermal cycles can activate the impurity region. The deep trench isolations are then formed after FEOL processing. The method achieves the reduced cost of forming deep trench isolations after FEOL processing, and allows the practice of sharing of a collector level between devices to continue. The invention also includes the semiconductor structure so formed.

1 . A semiconductor structure, comprising:
 a substrate; and   a deep trench isolation including:
 a dielectric positioned within a deep trench, and 
 a channel stop, 
 wherein at least a portion of an outer edge of the channel stop is spaced inwardly from an outer edge of the deep trench. 
   
   
   
       2 . Semiconductor structure of  claim 1 , wherein a dopant concentration of the channel stop decreases with increasing depth into the substrate. 
   
   
       3 . The semiconductor structure of  claim 1 , wherein the channel stop includes a dopant. 
   
   
       4 . The semiconductor structure of  claim 1 , further comprising a transistor device.