Inventor · disambiguated record
Lyndon R. Logan
Also filed as: LOGAN LYNDON R · LOGAN LYNDON RONALD
14 granted patents·3 pending applications·110 citations·filing 1995–2016
91Inventor score
Top patents by PatentIndex Score
17 records- 0196US9318622B1Fin-type PIN diode arrayIBM·Filed 2015·Granted Apr 19, 2016·15 cites·20 claims
- 0280US8000935B2Diagnostic method for root-cause analysis of FET performance variationIBM·Filed 2009·Granted Aug 16, 2011·6 cites·10 claims
- 0380US6756637B2Method of controlling floating body effects in an asymmetrical SOI deviceIBM·Filed 2001·Granted Jun 29, 2004·22 cites·10 claims
- 0479US7587298B2Diagnostic method for root-cause analysis of FET performance variationIBM·Filed 2007·Granted Sep 8, 2009·6 cites·20 claims
- 0577US9972550B2Source/drain epitaxial electrical monitorGLOBALFOUNDRIES INC·Filed 2015·Granted May 15, 2018·2 cites·18 claims
- 0667US6144081AMethod to suppress subthreshold leakage due to sharp isolation corners in submicron FET structuresIBM·Filed 1995·Granted Nov 7, 2000·22 cites·3 claims
- 0765US9941179B2Capacitive measurements of divots in semiconductor devicesIBM·Filed 2015·Granted Apr 10, 2018·1 cites·20 claims
- 0864US5567553AMethod to suppress subthreshold leakage due to sharp isolation corners in submicron FET structuresIBM·Filed 1995·Granted Oct 22, 1996·20 cites·14 claims
- 0961US6686252B2Method and structure to reduce CMOS inter-well leakageIBM·Filed 2001·Granted Feb 3, 2004·9 cites·42 claims
- 1058US6946710B2Method and structure to reduce CMOS inter-well leakageIBM·Filed 2003·Granted Sep 20, 2005·7 cites·26 claims
- 1153US9059190B2Measuring current and resistance using combined diodes/resistor structure to monitor integrated circuit manufacturing process variationsIBM·Filed 2014·Granted Jun 16, 2015·0 cites·18 claims
- 1249US2017062609A1High voltage finfet structure with shaped drift regionGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
- 1347US2016380095A1High voltage finfet structure with shaped drift regionIBM·Filed 2015·Application pending·0 cites
- 1444US9105707B2ZRAM heterochannel memoryIBM·Filed 2013·Granted Aug 11, 2015·0 cites·18 claims
- 1542US2004173847A1Method of controlling floating body effects in an asymmetrical SOI deviceFiled 2004·Application pending·0 cites
- 1640US8709833B2Measuring current and resistance using combined diodes/resistor structure to monitor integrated circuit manufacturing process variationsLOGAN LYNDON R·Filed 2011·Granted Apr 29, 2014·0 cites·18 claims
- 1732US9852956B2Extraction of resistance associated with laterally diffused dopant profiles in CMOS devicesGLOBALFOUNDRIES INC·Filed 2015·Granted Dec 26, 2017·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →