Inventor · disambiguated record
Mark Bourgeault
Also filed as: BOURGEAULT MARK
26 granted patents·1 pending application·160 citations·filing 2002–2023
95Inventor score
Top patents by PatentIndex Score
27 records- 0193US9602106B1Methods for optimizing circuit performance via configurable clock skewsALTERA CORP·Filed 2015·Granted Mar 21, 2017·9 cites·14 claims
- 0289US7676768B1Automatic asynchronous signal pipeliningALTERA CORP·Filed 2006·Granted Mar 9, 2010·13 cites·16 claims
- 0389US6971083B1Method for programming programmable logic device with blocks that perform multiplication and other arithmetic functionsALTERA CORP·Filed 2002·Granted Nov 29, 2005·70 cites·58 claims
- 0486US7412680B1Method and apparatus for performing integrated global routing and buffer insertionALTERA CORP·Filed 2005·Granted Aug 12, 2008·16 cites·21 claims
- 0584US10175734B1Techniques for adjusting latency of a clock signal to affect supply voltageALTERA CORP·Filed 2016·Granted Jan 8, 2019·6 cites·20 claims
- 0684US9584129B1Integrated circuit applications using partial reconfigurationALTERA CORP·Filed 2014·Granted Feb 28, 2017·8 cites·20 claims
- 0783US8504970B1Method and apparatus for performing automated timing closure analysis for systems implemented on target devicesMALHOTRA SHAWN·Filed 2011·Granted Aug 6, 2013·11 cites·26 claims
- 0882US10037048B1Methods for optimizing circuit performance via configurable clock skewsALTERA CORP·Filed 2017·Granted Jul 31, 2018·2 cites·20 claims
- 0980US10374609B1Integrated circuit applications using partial reconfigurationALTERA CORP·Filed 2017·Granted Aug 6, 2019·3 cites·20 claims
- 1080US10242146B2Method and apparatus for placing and routing partial reconfiguration modulesALTERA CORP·Filed 2016·Granted Mar 26, 2019·2 cites·18 claims
- 1178US9361421B2Method and apparatus for placing and routing partial reconfiguration modulesALTERA CORP·Filed 2014·Granted Jun 7, 2016·3 cites·19 claims
- 1272US11480993B2Methods for optimizing circuit performance via configurable clock skewsALTERA CORP·Filed 2021·Granted Oct 25, 2022·0 cites·20 claims
- 1372US7415692B1Method for programming programmable logic device with blocks that perform multiplication and other arithmetic functionsALTERA CORP·Filed 2005·Granted Aug 19, 2008·6 cites·24 claims
- 1470US8671377B2Method and apparatus for placement and routing of partial reconfiguration modulesGOLDMAN DAVID SAMUEL·Filed 2011·Granted Mar 11, 2014·2 cites·14 claims
- 1567US12383330B2Reusable minimally invasive surgical instrumentMICROLINE SURGICAL INC·Filed 2023·Granted Aug 12, 2025·0 cites·20 claims
- 1666US8356358B2Preventing information leakage between components on a programmable chip in the presence of faultsALTERA CORP·Filed 2009·Granted Jan 15, 2013·3 cites·20 claims
- 1765US11813017B2Reusable minimally invasive surgical instrumentMICROLINE SURGICAL INC·Filed 2019·Granted Nov 14, 2023·1 cites·25 claims
- 1865US11507723B2Method and apparatus for performing incremental compilation using structural netlist comparisonALTERA CORP·Filed 2019·Granted Nov 22, 2022·0 cites·18 claims
- 1965US9183336B1Automatic asynchronous signal pipeliningALTERA CORP·Filed 2014·Granted Nov 10, 2015·1 cites·20 claims
- 2063US8539414B1Automatic asynchronous signal pipeliningBOURGEAULT MARK·Filed 2010·Granted Sep 17, 2013·1 cites·20 claims
- 2163US8191028B1Methods and systems for improving a maximum operating frequency of an integrated circuit during a route phaseBOURGEAULT MARK·Filed 2009·Granted May 29, 2012·3 cites·20 claims
- 2262US11507722B2Method and apparatus for performing incremental compilation using structural netlist comparisonALTERA CORP·Filed 2019·Granted Nov 22, 2022·0 cites·7 claims
- 2362US2019064872A1Methods for optimizing circuit performance via configurable clock skewsALTERA CORP·Filed 2018·Application pending·0 cites
- 2460US11381243B2Integrated circuit applications using partial reconfigurationALTERA CORP·Filed 2019·Granted Jul 5, 2022·0 cites·21 claims
- 2560US10969820B2Methods for optimizing circuit performance via configurable clock skewsALTERA CORP·Filed 2019·Granted Apr 6, 2021·0 cites·6 claims
- 2651US8832627B1Automatic asynchronous signal pipeliningALTERA CORP·Filed 2013·Granted Sep 9, 2014·0 cites·18 claims
- 2749US10275557B1Method and apparatus for performing incremental compilation using structural netlist comparisonCHAN KEVIN·Filed 2010·Granted Apr 30, 2019·0 cites·38 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →