Integrated circuit applications using partial reconfiguration

Abstract

Systems and methods for generating and deploying integrated circuit (IC) applications are provided. Partial reconfiguration functionality of an IC may be used to build reconfigurable application platforms that enable application execution on the IC. These apps may include partial reconfiguration bitstreams that allow ease of access to programming without cumbersome compilation via a set of complex tools. The apps may be acquired via a purchasing website or other mechanism, where the bitstreams may be downloaded to the IC, thus increasing usability of the IC as well providing addition revenue streams.

What is claimed is: 
     
       1. A tangible, non-transitory, computer-readable medium, comprising instructions to:
 define one or more reconfigurable partial-reconfiguration bitstream application platforms, wherein the one or more reconfigurable partial-reconfiguration bitstream application platforms define one or more characteristics of an integrated circuit, comprising:
 one or more interconnects; 
 one or more constraints for partial-reconfiguration logic used to execute one or more partial reconfiguration apps; or 
 both; and 
 
 publish the one or more reconfigurable partial-reconfiguration bitstream application platforms via an app store, app service, or both; 
 wherein the one or more reconfigurable partial-reconfiguration bitstream application platforms configure an integrated circuit for executing the one or more partial reconfiguration apps, the one or more partial reconfiguration apps comprising one or more partial reconfiguration bitstreams intended to be executed according to the one or more characteristics to perform tasks of the one or more partial reconfiguration apps by reconfiguring, during runtime, reconfigurable attribute of the integrated circuit. 
 
     
     
       2. The tangible, non-transitory, computer-readable medium of  claim 1 , wherein the one or more characteristics comprise:
 a placement constraint of a particular region of partial-reconfiguration blocks (PR blocks) of the integrated circuit (IC) where a partial-reconfiguration application core is to be implemented on the IC, the partial-reconfiguration application core comprising a set of integrated circuit resources reserved for implementation of the one or more partial reconfiguration apps. 
 
     
     
       3. The tangible, non-transitory, computer-readable medium of  claim 1 , wherein the one or more characteristics comprise clock network constraints for the one or more partial reconfiguration apps. 
     
     
       4. The tangible, non-transitory, computer-readable medium of  claim 1 , wherein the one or more characteristics comprise routing constraints for the one or more partial reconfiguration apps. 
     
     
       5. The tangible, non-transitory, computer-readable medium of  claim 1 , wherein the one or more characteristics comprise a bridge between a peripheral component interconnect express (PCIe) interface and a partial-reconfiguration application core comprising a set of integrated circuit resources reserved for implementation of the one or more partial reconfiguration apps. 
     
     
       6. The tangible, non-transitory, computer-readable medium of  claim 1 , comprising instructions to:
 publish, via the app store, the app service, or both, the one or more partial reconfiguration apps that conform to the one or more characteristics defined by the one or more platforms. 
 
     
     
       7. The tangible, non-transitory, computer-readable medium of  claim 6 , comprising instructions to:
 detect a request to implement the one or more partial reconfiguration apps on the integrated circuit; 
 upon detecting the request, provide both the one or more reconfigurable partial-reconfiguration bitstream application platforms and the one or more partial reconfiguration apps to the integrated circuit, such that the one or more reconfigurable partial-reconfiguration bitstream application platforms define the one or more characteristics on the integrated circuit, such that the one or more partial reconfiguration bitstreams are executed according to the one or more characteristics. 
 
     
     
       8. The tangible, non-transitory, computer-readable medium of  claim 7 , comprising instructions to:
 license implementation of the one or more partial reconfiguration apps on the integrated circuit, based upon the request; 
 encrypt the one or more partial reconfiguration apps for subsequent decryption by a particular key prior to implementation on the IC, in accordance with the license. 
 
     
     
       9. The tangible, non-transitory, computer-readable medium of  claim 8 , wherein the particular key comprises a physical key of the IC, a soft key loaded onto the IC, or both. 
     
     
       10. The tangible, non-transitory, computer-readable medium of  claim 8 , comprising instructions to:
 encrypt the one or more partial reconfiguration apps under a “per-user” structure by enabling decryption of the application by any particular key of a device registered or owned by a particular user. 
 
     
     
       11. The tangible, non-transitory, computer-readable medium of  claim 1 , comprising instructions to:
 provide both the one or more reconfigurable partial-reconfiguration bitstream application platforms and the one or more partial reconfiguration apps to the integrated circuit via a host of the integrated circuit. 
 
     
     
       12. The tangible, non-transitory, computer-readable medium of  claim 11 , comprising instructions to:
 publish, via the app store, the app service, or both, one or more software development kits (SDKs) that enable generation of additional partial reconfiguration apps that conform to the one or more characteristics defined by the one or more reconfigurable partial-reconfiguration bitstream application platforms. 
 
     
     
       13. The tangible, non-transitory, computer-readable medium of  claim 12 , wherein the SDKs comprise a definition of a particular region of partial-reconfiguration blocks (PR blocks) of the integrated circuit (IC) where a partial-reconfiguration application core is to be implemented on the IC, the partial-reconfiguration application core comprising a set of integrated circuit resources reserved for implementation of the one or more partial reconfiguration apps. 
     
     
       14. The tangible, non-transitory, computer-readable medium of  claim 12 , wherein the SDKs comprise a definition of a timing model for the one or more reconfigurable partial-reconfiguration bitstream application platforms. 
     
     
       15. The tangible, non-transitory, computer-readable medium of  claim 11 , wherein the one or more characteristics comprise static logic, non-partial reconfiguration interfaces, or both. 
     
     
       16. A system, comprising a processor configured to:
 publish one or more reconfigurable partial reconfiguration apps via an app store, app service, or both, for access by a plurality of integrated circuit licensees; 
 wherein the one or more reconfigurable partial reconfiguration apps comprise one or more partial reconfiguration bitstreams intended to be executed according to one or more characteristics defined by a partial-reconfiguration bitstream application platform published via an app store, app service, or both; 
 wherein the one or more characteristics comprise:
 one or more interconnects; 
 one or more constraints for partial-reconfiguration logic used to execute one or more partial reconfiguration apps; or 
 both; and 
 
 wherein when the one or more partial reconfiguration bitstreams are implemented according to the one or more characteristics, they perform tasks of the one or more partial reconfiguration apps by reconfiguring, during runtime, one or more reconfigurable attributes of the integrated circuit. 
 
     
     
       17. The system of  claim 16 , wherein the processor is configured to:
 detect a request to implement the one or more partial reconfiguration apps on the integrated circuit; 
 upon detecting the request, provide both the one or more reconfigurable partial-reconfiguration bitstream application platforms and the one or more partial reconfiguration apps to the integrated circuit, such that the one or more reconfigurable partial-reconfiguration bitstream application platforms define the one or more characteristics on the integrated circuit, such that the one or more partial reconfiguration bitstreams are executed according to the one or more characteristics. 
 
     
     
       18. The system of  claim 17 , wherein the processor is configured to:
 license implementation of the one or more partial reconfiguration apps on the integrated circuit, based upon the request; 
 encrypt the one or more partial reconfiguration apps for subsequent decryption by a particular key prior to implementation on the IC, in accordance with the license. 
 
     
     
       19. A system, wherein the processor is configured to:
 publish, via an app store, an app service, or both, one or more software development kits (SDKs) that enable generation of partial reconfiguration apps that conform to one or more characteristics defined by on one or more reconfigurable partial-reconfiguration bitstream application platforms published via an app store, app service, or both; 
 wherein the one or more reconfigurable partial reconfiguration apps comprise one or more partial reconfiguration bitstreams; 
 wherein the one or more characteristics comprise:
 one or more interconnects; 
 one or more constraints for partial-reconfiguration logic used to execute one or more partial reconfiguration apps; or 
 both; and 
 
 wherein when the one or more partial reconfiguration bitstreams are implemented according to the one or more characteristics, they perform tasks of the one or more partial reconfiguration apps by reconfiguring, during runtime, one or more reconfigurable attributes of the integrated circuit. 
 
     
     
       20. The system of  claim 19 , wherein the SDKs comprise:
 a definition of a particular region of partial-reconfiguration blocks (PR blocks) of the integrated circuit (IC) where a partial-reconfiguration application core is to be implemented on the IC, the partial-reconfiguration application core comprising a set of integrated circuit resources reserved for implementation of the one or more partial reconfiguration apps; 
 a definition of a timing model for the one or more reconfigurable partial-reconfiguration bitstream application platforms; 
 or both.