Inventor · disambiguated record
Matheus Nogueira Fonseca
Also filed as: FONSECA MATHEUS · FONSECA MATHEUS NOGUEIRA
5 granted patents·1 pending application·5 citations·filing 2017–2023
67Inventor score
Technology areasG06F
Files withCADENCE DESIGN SYSTEMS INC6
Top patents by PatentIndex Score
6 records- 0172US10783305B1System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit designCADENCE DESIGN SYSTEMS INC·Filed 2019·Granted Sep 22, 2020·2 cites·20 claims
- 0267US10796051B1Adaptive model interface for a plurality of EDA programsCADENCE DESIGN SYSTEMS INC·Filed 2019·Granted Oct 6, 2020·2 cites·20 claims
- 0366US10540467B1System, method, and computer program product for handling combinational loops associated with the formal verification of an electronic circuit designCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Jan 21, 2020·1 cites·20 claims
- 0453US11507720B1Systems and methods for signal observability ratingCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Nov 22, 2022·0 cites·19 claims
- 0543US2024311538A1System and Method for Glitch DebuggingCADENCE DESIGN SYSTEMS INC·Filed 2023·Application pending·0 cites
- 0637US10521531B1System, method, and computer program product for range-based clock analysis associated with the formal verification of an electronic circuit designCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Dec 31, 2019·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →