Inventor · disambiguated record
Mark Steven Hahn
Also filed as: HAHN MARK · HAHN MARK S · HAHN MARK STEVEN
8 granted patents·159 citations·filing 1998–2010
89Inventor score
Technology areasG06F
Top patents by PatentIndex Score
8 records- 0191US8453091B1Method and mechanism for managing hierarchical data for implementing region queryRAO GURUPRASAD G·Filed 2010·Granted May 28, 2013·29 cites·56 claims
- 0287US8453136B1Change tracking and incremental synchronization of EDA design and technology dataHAHN MARK STEVEN·Filed 2007·Granted May 28, 2013·27 cites·20 claims
- 0385US8413087B1Method and mechanism for implementing region query using hierarchical gridsRAO GURUPRASAD G·Filed 2010·Granted Apr 2, 2013·10 cites·30 claims
- 0482US8407228B1Method and mechanism for maintaining existence information for electronic layout dataHAHN MARK·Filed 2010·Granted Mar 26, 2013·10 cites·49 claims
- 0578US6622290B1Timing verification method employing dynamic abstraction in core/shell partitioningCADENCE DESIGN SYSTEMS INC·Filed 2000·Granted Sep 16, 2003·34 cites·9 claims
- 0677US8413093B1Method and mechanism for performing region query using hierarchical gridsRAO GURUPRASAD G·Filed 2010·Granted Apr 2, 2013·5 cites·42 claims
- 0768US7188327B2Method and system for logic-level circuit modelingCADENCE DESIGN SYSTEMS INC·Filed 2003·Granted Mar 6, 2007·14 cites·30 claims
- 0852US6263478B1System and method for generating and using stage-based constraints for timing-driven designCADENCE DESIGN SYSTEMS INC·Filed 1998·Granted Jul 17, 2001·30 cites·50 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →