Inventor · disambiguated record
Maxwell Lippitt
Also filed as: LIPPITT III MAXWELL W · LIPPITT III MAXWELL WALTHOUR · LIPPITT MAXWELL · LIPPITT MAXWELL W
12 granted patents·3 pending applications·78 citations·filing 1991–2018
87Inventor score
Files withTEXAS INSTRUMENTS INC4AGERE SYSTEMS INC3GLOBALFOUNDRIES INC2HARRIS CORP2LIPPITT III MAXWELL WALTHOUR1
Top patents by PatentIndex Score
15 records- 0180US9917009B2Methods of forming a through-substrate-via (TSV) and a metallization layer after formation of a semiconductor deviceGLOBALFOUNDRIES INC·Filed 2016·Granted Mar 13, 2018·3 cites·20 claims
- 0270US7902033B2Methods and devices for a high-k stacked capacitorTEXAS INSTRUMENTS INC·Filed 2008·Granted Mar 8, 2011·4 cites·19 claims
- 0370US5235205ALaser trimmed integrated circuitHARRIS CORP·Filed 1992·Granted Aug 10, 1993·46 cites·8 claims
- 0460US7670920B2Methods and apparatus for forming a polysilicon capacitorTEXAS INSTRUMENTS INC·Filed 2007·Granted Mar 2, 2010·2 cites·20 claims
- 0556US7800226B2Integrated circuit with metal silicide regionsAGERE SYSTEMS INC·Filed 2007·Granted Sep 21, 2010·1 cites·3 claims
- 0650US10446443B2Integrated circuit product having a through-substrate-via (TSV) and a metallization layer that are formed after formation of a semiconductor deviceGLOBALFOUNDRIES INC·Filed 2018·Granted Oct 15, 2019·0 cites·20 claims
- 0750US5096850AMethod of laser trimmingHARRIS CORP·Filed 1991·Granted Mar 17, 1992·20 cites·12 claims
- 0840US7250356B2Method for forming metal silicide regions in an integrated circuitAGERE SYSTEMS INC·Filed 2002·Granted Jul 31, 2007·1 cites·5 claims
- 0939US2008207006A1Process for fabricating an integrated circuitMARTIN JAMES SCOTT·Filed 2007·Application pending·0 cites
- 1038US2007075348A1High density, high Q capacitor on top of a protective layerTEXAS INSTRUMENTS INC·Filed 2005·Application pending·0 cites
- 1135US8431463B2Capacitor contact formed concurrently with bond pad metallizationLIPPITT III MAXWELL WALTHOUR·Filed 2009·Granted Apr 30, 2013·0 cites·26 claims
- 1234US8497565B2Multiple electrode layer backend stacked capacitorWILLAIMS BYRON LOVELL·Filed 2011·Granted Jul 30, 2013·0 cites·18 claims
- 1332US7033931B2Temperature optimization of a physical vapor deposition process to prevent extrusion into openingsAGERE SYSTEMS INC·Filed 2003·Granted Apr 25, 2006·0 cites·30 claims
- 1432US2006199328A1Non-dispersive high density polysilicon capacitor utilizing amorphous silicon electrodesTEXAS INSTRUMENTS INC·Filed 2005·Application pending·0 cites
- 1529US6010828AMethod of and device for planarizing a surface of a semiconductor waferLUCENT TECHNOLOGIES INC·Filed 1998·Granted Jan 4, 2000·1 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →