Inventor · disambiguated record
Mahesh Madhav
Also filed as: MADHAV MAHESH · MADHAV MAHESH JAGDISH
6 granted patents·5 pending applications·1 citations·filing 2009–2024
66Inventor score
Technology areasG06F
Top patents by PatentIndex Score
11 records- 0171US10866888B2Reservation architecture for overcommitted memoryINTEL CORP·Filed 2018·Granted Dec 15, 2020·1 cites·25 claims
- 0264US11681611B2Reservation architecture for overcommitted memoryINTEL CORP·Filed 2020·Granted Jun 20, 2023·0 cites·25 claims
- 0353US2024354110A1Runtime adaptive prefetching in a many-core systemAMPERE COMPUTING LLC·Filed 2024·Application pending·0 cites
- 0452US2024232090A1Multi-trained scalable prefetcher, and related methodsAMPERE COMPUTING LLC·Filed 2024·Application pending·0 cites
- 0551US11169929B2Pause communication from I/O devices supporting page faultsINTEL CORP·Filed 2018·Granted Nov 9, 2021·0 cites·18 claims
- 0651US10579551B2Memory pressure notifierINTEL CORP·Filed 2017·Granted Mar 3, 2020·0 cites·23 claims
- 0748US10733108B2Physical page tracking for handling overcommitted memoryINTEL CORP·Filed 2018·Granted Aug 4, 2020·0 cites·20 claims
- 0842US11392491B2Hardware-assisted paging mechanismsINTEL CORP·Filed 2018·Granted Jul 19, 2022·0 cites·22 claims
- 0942US2011153529A1Method and apparatus to efficiently generate a processor architecture modelBRACY ANNE W·Filed 2009·Application pending·0 cites
- 1041US2022197807A1Latency-aware prefetch bufferAMPERE COMPUTING LLC·Filed 2020·Application pending·0 cites
- 1141US2019303281A1Survivability guarantees for memory trafficFIROOZSHAHIAN AMIN·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →