Inventor · disambiguated record
Matthew Mattina
Also filed as: MATTINA MATTHEW · MATTINA MATTHEW C
63 granted patents·12 pending applications·1,784 citations·filing 2001–2025
99Inventor score
Files withADVANCED RISC MACH LTD24TILERA CORP10INTEL CORP8BRATT IAN RUDOLF6MELLANOX TECHNOLOGIES LTD6
Top patents by PatentIndex Score
75 records- 0199US7882307B1Managing cache memory in a parallel processing environmentTILERA CORP·Filed 2006·Granted Feb 1, 2011·132 cites·39 claims
- 0299US7805575B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2007·Granted Sep 28, 2010·139 cites·81 claims
- 0398US7853755B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2007·Granted Dec 14, 2010·56 cites·50 claims
- 0497US10606750B1Computing in parallel processing environmentsMELLANOX TECHNOLOGIES LTD·Filed 2017·Granted Mar 31, 2020·21 cites·23 claims
- 0597US10579524B1Computing in parallel processing environmentsMELLANOX TECHNOLOGIES LTD·Filed 2017·Granted Mar 3, 2020·15 cites·27 claims
- 0697US10515045B1Computing in parallel processing environmentsMELLANOX TECHNOLOGIES LTD·Filed 2017·Granted Dec 24, 2019·16 cites·23 claims
- 0797US8677081B1Transferring and storing data in multicore and multiprocessor architecturesWENTZLAFF DAVID M·Filed 2011·Granted Mar 18, 2014·41 cites·19 claims
- 0897US7853752B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2007·Granted Dec 14, 2010·36 cites·20 claims
- 0997US7620791B1Mapping memory in a parallel processing environmentTILERA CORP·Filed 2006·Granted Nov 17, 2009·84 cites·16 claims
- 1097US7461210B1Managing set associative cache memory according to entry typeTILERA CORP·Filed 2006·Granted Dec 2, 2008·82 cites·24 claims
- 1196US9886275B1Multi-core processor using three dimensional integrationCARLSON ANDREW·Filed 2014·Granted Feb 6, 2018·43 cites·19 claims
- 1296US9639487B1Managing cache memory in a parallel processing environmentMATTINA MATTHEW·Filed 2016·Granted May 2, 2017·15 cites·26 claims
- 1396US8738860B1Computing in parallel processing environmentsGRIFFIN PATRICK ROBERT·Filed 2011·Granted May 27, 2014·593 cites·9 claims
- 1496US8631205B1Managing cache memory in a parallel processing environmentWENTZLAFF DAVID M·Filed 2012·Granted Jan 14, 2014·30 cites·20 claims
- 1596US8572353B1Condensed router headers with low latency output port calculationBRATT IAN RUDOLF·Filed 2010·Granted Oct 29, 2013·42 cites·26 claims
- 1696US8234451B1Caching in multicore and multiprocessor architecturesAGARWAL ANANT·Filed 2011·Granted Jul 31, 2012·20 cites·46 claims
- 1796US7805577B1Managing memory access in a parallel processing environmentTILERA CORP·Filed 2006·Granted Sep 28, 2010·62 cites·44 claims
- 1895US11783163B2Hardware accelerator for IM2COL operationADVANCED RISC MACH LTD·Filed 2020·Granted Oct 10, 2023·5 cites·18 claims
- 1995US10073778B1Caching in multicore and multiprocessor architecturesBRATT IAN RUDOLF·Filed 2016·Granted Sep 11, 2018·11 cites·23 claims
- 2095US7987321B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2010·Granted Jul 26, 2011·16 cites·47 claims
- 2195US7853754B1Caching in multicore and multiprocessor architecturesTILERA CORP·Filed 2007·Granted Dec 14, 2010·23 cites·33 claims
- 2294US9507745B1Low latency dynamic route selectionBRATT IAN RUDOLF·Filed 2015·Granted Nov 29, 2016·9 cites·25 claims
- 2394US8200901B1Managing cache memory in a parallel processing environmentWENTZLAFF DAVID·Filed 2011·Granted Jun 12, 2012·18 cites·26 claims
- 2493US11561767B2Mixed-precision computation unitADVANCED RISC MACH LTD·Filed 2020·Granted Jan 24, 2023·4 cites·20 claims
- 2593US10887238B2High performance, scalable multi chip interconnectMELLANOX TECHNOLOGIES LTD·Filed 2019·Granted Jan 5, 2021·7 cites·27 claims
- 2692US9479431B1Route prediction in packet switched networksBRATT IAN RUDOLF·Filed 2015·Granted Oct 25, 2016·6 cites·13 claims
- 2791US8934347B1Low latency dynamic route selectionBRATT IAN RUDOLF·Filed 2010·Granted Jan 13, 2015·10 cites·17 claims
- 2890US9514050B1Caching in multicore and multiprocessor architecturesAGARWAL ANANT·Filed 2013·Granted Dec 6, 2016·8 cites·22 claims
- 2989US11379556B2Apparatus and method for matrix operationsADVANCED RISC MACH LTD·Filed 2019·Granted Jul 5, 2022·5 cites·19 claims
- 3089US8560780B1Caching in multicore and multiprocessor architecturesAGARWAL ANANT·Filed 2012·Granted Oct 15, 2013·6 cites·26 claims
- 3189US7551564B2Flow control method and apparatus for single packet arrival on a bidirectional ring interconnectINTEL CORP·Filed 2004·Granted Jun 23, 2009·61 cites·42 claims
- 3288US11640533B2System, method and apparatus for training neural networks using multiple datasetsADVANCED RISC MACH LTD·Filed 2018·Granted May 2, 2023·8 cites·17 claims
- 3388US10339059B1Global socket to socket cache coherence architectureMATTINA MATTHEW·Filed 2014·Granted Jul 2, 2019·12 cites·22 claims
- 3488US9135215B1Route prediction in packet switched networksBRATT IAN RUDOLF·Filed 2010·Granted Sep 15, 2015·6 cites·33 claims
- 3587US8112581B1Caching in multicore and multiprocessor architecturesAGARWAL ANANT·Filed 2010·Granted Feb 7, 2012·5 cites·37 claims
- 3686US11526743B2Artificial neural network optical hardware acceleratorADVANCED RISC MACH LTD·Filed 2020·Granted Dec 13, 2022·2 cites·24 claims
- 3785US9298618B1Managing cache memory in a parallel processing environmentMATTINA MATTHEW·Filed 2014·Granted Mar 29, 2016·5 cites·16 claims
- 3884US12067373B2Hybrid filter banks for artificial neural networksADVANCED RISC MACH LTD·Filed 2020·Granted Aug 20, 2024·2 cites·22 claims
- 3983US10367741B1High performance, scalable multi chip interconnectMELLANOX TECHNOLOGIES LTD·Filed 2016·Granted Jul 30, 2019·3 cites·18 claims
- 4082US11693796B2Multi-dimensional data path architectureADVANCED RISC MACH LTD·Filed 2021·Granted Jul 4, 2023·1 cites·20 claims
- 4180US11928176B2Time domain unrolling sparse matrix multiplication system and methodADVANCED RISC MACH LTD·Filed 2020·Granted Mar 12, 2024·1 cites·14 claims
- 4280US11188814B2Systolic convolutional neural networkADVANCED RISC MACH LTD·Filed 2018·Granted Nov 30, 2021·4 cites·19 claims
- 4379US11392376B2Processor for sparse matrix computationADVANCED RISC MACH LTD·Filed 2019·Granted Jul 19, 2022·2 cites·23 claims
- 4479US11120101B2Matrix multiplication system and methodADVANCED RISC MACH LTD·Filed 2019·Granted Sep 14, 2021·3 cites·19 claims
- 4577US9424228B2High performance, scalable multi chip interconnectTILERA CORP·Filed 2013·Granted Aug 23, 2016·3 cites·16 claims
- 4674US11151033B1Cache coherency in multiprocessor systemMELLANOX TECHNOLOGIES LTD·Filed 2014·Granted Oct 19, 2021·1 cites·22 claims
- 4773US7620954B2Mechanism for handling load lock/store conditional primitives in directory-based distributed shared memory multiprocessorsHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Nov 17, 2009·20 cites·28 claims
- 4872US11886987B2Non-volatile memory-based compact mixed-signal multiply-accumulate engineADVANCED RISC MACH LTD·Filed 2019·Granted Jan 30, 2024·2 cites·21 claims
- 4972US7558920B2Apparatus and method for partitioning a shared cache of a chip multi-processorINTEL CORP·Filed 2004·Granted Jul 7, 2009·24 cites·30 claims
- 5070US7624236B2Predictive early write-back of owned cache blocks in a shared memory computer systemINTEL CORP·Filed 2004·Granted Nov 24, 2009·14 cites·22 claims
Showing the top 50 of 75 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →