Inventor · disambiguated record
Martin Recktenwald
Also filed as: RECKTENWALD MARTIN
91 granted patents·2 pending applications·168 citations·filing 2003–2023
99Inventor score
Top patents by PatentIndex Score
93 records- 0194US10671532B2Reducing cache transfer overhead in a systemIBM·Filed 2017·Granted Jun 2, 2020·7 cites·18 claims
- 0294US7870438B2Method, system and computer program product for sampling computer system performance dataIBM·Filed 2008·Granted Jan 11, 2011·38 cites·19 claims
- 0393US9665486B2Hierarchical cache structure and handling thereofIBM·Filed 2016·Granted May 30, 2017·10 cites·20 claims
- 0493US9563568B2Hierarchical cache structure and handling thereofIBM·Filed 2015·Granted Feb 7, 2017·9 cites·20 claims
- 0593US9274959B2Handling virtual memory address synonyms in a multi-level cache hierarchy structureGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 1, 2016·23 cites·20 claims
- 0690US11775445B2Translation support for a virtual cacheIBM·Filed 2020·Granted Oct 3, 2023·2 cites·17 claims
- 0790US9183146B2Hierarchical cache structure and handling thereofIBM·Filed 2013·Granted Nov 10, 2015·11 cites·20 claims
- 0888US11010298B2Reducing cache transfer overhead in a systemIBM·Filed 2020·Granted May 18, 2021·2 cites·18 claims
- 0988US10579525B2Reducing cache transfer overhead in a systemIBM·Filed 2017·Granted Mar 3, 2020·3 cites·24 claims
- 1087US10585800B2Reducing cache transfer overhead in a systemIBM·Filed 2017·Granted Mar 10, 2020·3 cites·24 claims
- 1186US11586542B2Reducing cache transfer overhead in a systemIBM·Filed 2021·Granted Feb 21, 2023·1 cites·20 claims
- 1285US10831478B2Sort and merge instruction for a general-purpose processorIBM·Filed 2018·Granted Nov 10, 2020·3 cites·20 claims
- 1385US9720441B1Generating time-of-day values without causing execution stallsIBM·Filed 2016·Granted Aug 1, 2017·4 cites·20 claims
- 1483US9250915B2Operand fetching control as a function of branch confidenceIBM·Filed 2012·Granted Feb 2, 2016·6 cites·9 claims
- 1582US11403222B2Cache structure using a logical directoryIBM·Filed 2020·Granted Aug 2, 2022·1 cites·20 claims
- 1682US10713168B2Cache structure using a logical directoryIBM·Filed 2017·Granted Jul 14, 2020·2 cites·15 claims
- 1781US9619385B2Single thread cache miss rate estimationIBM·Filed 2015·Granted Apr 11, 2017·3 cites·13 claims
- 1880US12141076B2Translation support for a virtual cacheIBM·Filed 2023·Granted Nov 12, 2024·0 cites·14 claims
- 1979US11892949B2Reducing cache transfer overhead in a systemIBM·Filed 2023·Granted Feb 6, 2024·0 cites·20 claims
- 2078US7602874B2Providing accurate time-based counters for scaling operating frequencies of microprocessorsIBM·Filed 2006·Granted Oct 13, 2009·8 cites·18 claims
- 2177US9384131B2Systems and methods for accessing cache memoryIBM·Filed 2013·Granted Jul 5, 2016·4 cites·19 claims
- 2276US10949351B2Bits register for synonyms in a memory systemIBM·Filed 2019·Granted Mar 16, 2021·1 cites·20 claims
- 2376US9886395B2Evicting cached storesIBM·Filed 2015·Granted Feb 6, 2018·2 cites·7 claims
- 2476US9720764B2Uncorrectable memory errors in pipelined CPUsIBM·Filed 2015·Granted Aug 1, 2017·2 cites·20 claims
- 2576US9323673B2Hierarchical cache structure and handling thereofIBM·Filed 2013·Granted Apr 26, 2016·3 cites·20 claims
- 2674US10579332B1Hardware sort accelerator sharing first level processor cacheIBM·Filed 2018·Granted Mar 3, 2020·1 cites·20 claims
- 2773US10606762B2Sharing virtual and real translations in a virtual cacheIBM·Filed 2017·Granted Mar 31, 2020·1 cites·4 claims
- 2873US10528482B2Cache managementIBM·Filed 2018·Granted Jan 7, 2020·1 cites·20 claims
- 2972US10691412B2Parallel sort accelerator sharing first level processor cacheIBM·Filed 2018·Granted Jun 23, 2020·1 cites·17 claims
- 3072US10127159B1Link consistency in a hierarchical TLB with concurrent table walksIBM·Filed 2017·Granted Nov 13, 2018·1 cites·8 claims
- 3172US9959155B2Testing a data coherency algorithmIBM·Filed 2016·Granted May 1, 2018·1 cites·13 claims
- 3271US9928127B2Testing a data coherency algorithmIBM·Filed 2016·Granted Mar 27, 2018·1 cites·20 claims
- 3370US9658967B2Evicting cached storesIBM·Filed 2014·Granted May 23, 2017·2 cites·7 claims
- 3470US9292443B2Multilevel cache systemIBM·Filed 2013·Granted Mar 22, 2016·2 cites·20 claims
- 3569US11281469B2Saving and restoring machine state between multiple executions of an instructionIBM·Filed 2020·Granted Mar 22, 2022·0 cites·20 claims
- 3669US8977823B2Store buffer for transactional memoryIBM·Filed 2012·Granted Mar 10, 2015·2 cites·22 claims
- 3767US11099919B2Testing a data coherency algorithmIBM·Filed 2020·Granted Aug 24, 2021·0 cites·20 claims
- 3867US10949212B2Saving and restoring machine state between multiple executions of an instructionIBM·Filed 2020·Granted Mar 16, 2021·0 cites·20 claims
- 3967US10572387B2Hardware control of CPU hold of a cache line in private cache where cache invalidate bit is reset upon expiration of timerIBM·Filed 2018·Granted Feb 25, 2020·1 cites·13 claims
- 4066US11204881B2Computer system software/firmware and a processor unit with a security moduleIBM·Filed 2019·Granted Dec 21, 2021·0 cites·18 claims
- 4165US10970214B2Selective downstream cache processing for data accessIBM·Filed 2019·Granted Apr 6, 2021·0 cites·17 claims
- 4265US10956328B2Selective downstream cache processing for data accessIBM·Filed 2019·Granted Mar 23, 2021·0 cites·19 claims
- 4364US2019213129A1Selective downstream cache processing for data accessIBM·Filed 2019·Application pending·0 cites
- 4463US10831503B2Saving and restoring machine state between multiple executions of an instructionIBM·Filed 2018·Granted Nov 10, 2020·0 cites·20 claims
- 4563US10719294B2Hardware sort accelerator sharing first level processor cacheIBM·Filed 2019·Granted Jul 21, 2020·0 cites·17 claims
- 4662US11221850B2Sort and merge instruction for a general-purpose processorIBM·Filed 2020·Granted Jan 11, 2022·0 cites·20 claims
- 4762US11010307B2Cache managementIBM·Filed 2019·Granted May 18, 2021·0 cites·20 claims
- 4861US10558510B2Testing a data coherency algorithmIBM·Filed 2018·Granted Feb 11, 2020·0 cites·20 claims
- 4961US10409724B2Selective downstream cache processing for data accessIBM·Filed 2017·Granted Sep 10, 2019·0 cites·4 claims
- 5060US10417127B2Selective downstream cache processing for data accessIBM·Filed 2017·Granted Sep 17, 2019·0 cites·12 claims
Showing the top 50 of 93 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →