Inventor · disambiguated record
Md Altaf Hossain
Also filed as: HOSSAIN MD ALTAF
53 granted patents·37 pending applications·66 citations·filing 2010–2025
97Inventor score
Top patents by PatentIndex Score
90 records- 0197US11929339B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2023·Granted Mar 12, 2024·2 cites·20 claims
- 0293US11557541B2Interconnect architecture with silicon interposer and EMIBINTEL CORP·Filed 2018·Granted Jan 17, 2023·6 cites·25 claims
- 0393US11528809B2Method for orienting solder balls on a BGA deviceTAHOE RES LTD·Filed 2021·Granted Dec 13, 2022·2 cites·21 claims
- 0492US12353238B2Flexible instruction set architecture supporting varying frequenciesINTEL CORP·Filed 2021·Granted Jul 8, 2025·2 cites·22 claims
- 0591US12026008B2Techniques for clock signal transmission in integrated circuits and interposersINTEL CORP·Filed 2022·Granted Jul 2, 2024·1 cites·19 claims
- 0691US11216397B2Translation circuitry for an interconnection in an active interposer of a semiconductor packageINTEL CORP·Filed 2019·Granted Jan 4, 2022·6 cites·20 claims
- 0791US9293426B2Land side and die side cavities to reduce package Z-heightHOSSAIN MD ALTAF·Filed 2012·Granted Mar 22, 2016·12 cites·26 claims
- 0889US11080449B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2020·Granted Aug 3, 2021·2 cites·20 claims
- 0987US2025077753A1Modular periphery tile for integrated circuit deviceALTERA CORP·Filed 2024·Application pending·0 cites
- 1086US12266625B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2024·Granted Apr 1, 2025·0 cites·20 claims
- 1186US10642946B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2018·Granted May 5, 2020·3 cites·17 claims
- 1286US9940984B1Shared command address (C/A) bus for multiple memory channelsINTEL CORP·Filed 2016·Granted Apr 10, 2018·8 cites·21 claims
- 1385US9721882B2Land side and die side cavities to reduce package z-heightINTEL CORP·Filed 2017·Granted Aug 1, 2017·3 cites·20 claims
- 1482US12153866B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2023·Granted Nov 26, 2024·0 cites·20 claims
- 1581US12347783B2Interconnect architecture with silicon interposer and EMIBINTEL CORP·Filed 2024·Granted Jul 1, 2025·0 cites·20 claims
- 1681US12206410B2Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2023·Granted Jan 21, 2025·0 cites·20 claims
- 1781US10601426B1Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2018·Granted Mar 24, 2020·2 cites·21 claims
- 1881US10297542B2Land side and die side cavities to reduce package z-heightINTEL CORP·Filed 2017·Granted May 21, 2019·2 cites·12 claims
- 1980US9799556B2Land side and die side cavities to reduce package z-heightINTEL CORP·Filed 2016·Granted Oct 24, 2017·2 cites·13 claims
- 2079US2025286555A1Power Management using Voltage Islands on Programmable Logic DevicesALTERA CORP·Filed 2025·Application pending·0 cites
- 2178US11901299B2Interconnect architecture with silicon interposer and EMIBINTEL CORP·Filed 2022·Granted Feb 13, 2024·0 cites·25 claims
- 2278US11500412B2Techniques for clock signal transmission in integrated circuits and interposersINTEL CORP·Filed 2019·Granted Nov 15, 2022·2 cites·16 claims
- 2378US2025315079A1Flexible Instruction Set Architecture Supporting Varying FrequenciesALTERA CORP·Filed 2025·Application pending·0 cites
- 2478US2023112097A1Method for orienting solder balls on a bga deviceTAHOE RES LTD·Filed 2022·Application pending·0 cites
- 2577US2025271826A1Systems and methods to reduce voltage guardbandALTERA CORP·Filed 2025·Application pending·0 cites
- 2676US11915996B2Microelectronics assembly including top and bottom packages in stacked configuration with shared coolingINTEL CORP·Filed 2019·Granted Feb 27, 2024·2 cites·20 claims
- 2776US11658144B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2021·Granted May 23, 2023·0 cites·20 claims
- 2875US12379698B2Systems and methods to reduce voltage guardbandINTEL CORP·Filed 2021·Granted Aug 5, 2025·0 cites·21 claims
- 2975US11714941B2Modular periphery tile for integrated circuit deviceINTEL CORP·Filed 2021·Granted Aug 1, 2023·0 cites·20 claims
- 3074US11595045B2Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2021·Granted Feb 28, 2023·0 cites·20 claims
- 3173US9480162B2Circuit board with integrated passive devicesINTEL CORP·Filed 2015·Granted Oct 25, 2016·2 cites·20 claims
- 3273US2021288013A1Interface Bus for Inter-Die Communication in a Multi-Chip Package Over High Density InterconnectsINTEL CORP·Filed 2021·Application pending·0 cites
- 3372US8674235B2Microelectronic substrate for alternate package functionalityHOSSAIN MD ALTAF·Filed 2011·Granted Mar 18, 2014·4 cites·13 claims
- 3471US11070209B2Programmable logic device with fine-grained disaggregationINTEL CORP·Filed 2020·Granted Jul 20, 2021·0 cites·7 claims
- 3570US11669472B2Frequency translation circuitry for an interconnection in an active interposer of a semiconductor packageINTEL CORP·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 3670US9237659B2BGA structure using CTF balls in high stress regionsHOSSAIN MD ALTAF·Filed 2012·Granted Jan 12, 2016·1 cites·20 claims
- 3769US12487658B2Workload-dependent integrated circuit operation based on power headroomINTEL CORP·Filed 2021·Granted Dec 2, 2025·0 cites·20 claims
- 3869US12355359B2Switch based on load currentINTEL CORP·Filed 2021·Granted Jul 8, 2025·0 cites·20 claims
- 3968US11342238B2Rotatable architecture for multi-chip package (MCP)INTEL CORP·Filed 2018·Granted May 24, 2022·1 cites·20 claims
- 4067US12341511B2Power management using voltage islands on programmable logic devicesINTEL CORP·Filed 2021·Granted Jun 24, 2025·0 cites·20 claims
- 4162US10980134B2Method for orienting solder balls on a BGA deviceINTEL CORP·Filed 2019·Granted Apr 13, 2021·0 cites·9 claims
- 4262US10950537B2Land side and die side cavities to reduce package z-heightINTEL CORP·Filed 2019·Granted Mar 16, 2021·0 cites·20 claims
- 4361US12481345B2Techniques for power management in compute circuitsINTEL CORP·Filed 2022·Granted Nov 25, 2025·0 cites·20 claims
- 4461US11121109B2Innovative interconnect design for package architecture to improve latencyINTEL CORP·Filed 2018·Granted Sep 14, 2021·0 cites·20 claims
- 4561US11056452B2Interface bus for inter-die communication in a multi-chip package over high density interconnectsINTEL CORP·Filed 2018·Granted Jul 6, 2021·0 cites·15 claims
- 4661US2025125296A1Double Bump Design for Multiple Purpose IO ConnectionsKOLLURU KRISHNA BHARATH·Filed 2024·Application pending·0 cites
- 4761US2024321716A1Electronic Devices Having Oval Power Delivery PadsALTERA CORP·Filed 2024·Application pending·0 cites
- 4861US2021296242A1Side mounted interconnect bridgesINTEL CORP·Filed 2021·Application pending·0 cites
- 4961US2024312905A1Techniques For Providing Supply Current To Dies In A System Using An InductorALTERA CORP·Filed 2024·Application pending·0 cites
- 5060US2025323162A1Power Delivery Systems and Methods with a Single Power RailALTERA CORP·Filed 2025·Application pending·0 cites
Showing the top 50 of 90 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →