Side mounted interconnect bridges

Abstract

A device and method of utilizing an interconnect bridge to electrically couple two semiconductor dies located on different surfaces. Integrated circuit packages using an interconnect bridge to electrically couple a semiconductor die on a substrate to a semiconductor die on a motherboard are shown. Integrated circuit packages using an interconnect bridge to electrically couple a semiconductor die on a top surface of a substrate to a semiconductor die on a bottom surface of a substrate are shown. Methods of electrically coupling semiconductor dies on different surfaces using interconnect bridges are shown.

1 . A semiconductor device, comprising:
 a substrate having a top and bottom major planar surface;   a first semiconductor die attached to the top major planar surface of the substrate;   an interconnect bridge attached to a side surface of the substrate perpendicular to the top major planar surface, and wherein the interconnect bridge is electrically coupled to the first semiconductor die; and   a second semiconductor die electrically coupled to a second end of the interconnect bridge.   
     
     
         2 . The semiconductor device of  claim 1 , wherein the second semiconductor die is attached on a side of the substrate opposite the first semiconductor die. 
     
     
         3 . The semiconductor device of  claim 1 , further including a motherboard coupled to the substrate, and wherein the second semiconductor die is attached to the motherboard. 
     
     
         4 . The semiconductor device of  claim 1 , wherein the interconnect bridge is electrically coupled to the first semiconductor die through pads on the side surface of the substrate perpendicular to the top major planar surface. 
     
     
         5 . The semiconductor device of  claim 4 , wherein the interconnect bridge is electrically coupled to the first semiconductor die through one or more micro-bumps coupled between the interconnect bridge and the pads. 
     
     
         6 . The semiconductor device of  claim 1 , wherein the interconnect bridge is electrically coupled to the first semiconductor die through pads on exposed surfaces of more than two layers of the side surface of the substrate perpendicular to the top major planar surface. 
     
     
         7 . The semiconductor device of  claim 1 , wherein the interconnect bridge is electrically coupled to the first semiconductor die through one or more vias passing vertically through one or more layers of the substrate. 
     
     
         8 . The semiconductor device of  claim 1 , wherein the interconnect bridge is electrically coupled to the first semiconductor die through one or more pathways including both vertical vias and horizontal traces. 
     
     
         9 . A semiconductor device, comprising:
 a substrate;   a first semiconductor die attached to the substrate;   an interconnect bridge embedded in a side surface of the substrate and wherein the interconnect bridge is electrically coupled to the first semiconductor die; and   a second semiconductor die electrically attached on a side of the substrate opposite the first semiconductor die, the second semiconductor die coupled to a second end of the interconnect bridge.   
     
     
         10 . The semiconductor device of  claim 9 , further including a motherboard attached to the substrate, wherein the second semiconductor die is attached between the substrate and the motherboard. 
     
     
         11 . The semiconductor device of  claim 10 , further including solder balls that couple the substrate to the motherboard, wherein the solder balls have a taller dimension than a thickness of the second semiconductor die. 
     
     
         12 . The semiconductor device of  claim 10 , wherein the solder balls are part of a ball-grid array. 
     
     
         13 . The semiconductor device of  claim 9 , wherein the interconnect bridge includes a repeater circuit. 
     
     
         14 . The semiconductor device of  claim 9 , wherein the interconnect bridge is a silicon interconnect bridge. 
     
     
         15 . The semiconductor device of  claim 9 , wherein the substrate is a multi-layer substrate, and wherein a side surface of both a top and bottom layer of the substrate are coplanar with an exposed surface of the interconnect bridge. 
     
     
         16 . The semiconductor device of  claim 9 , wherein the interconnect bridge is electrically coupled to the first semiconductor die through connections on more than two layers of the side surface of the substrate perpendicular to the top major planar surface. 
     
     
         17 . The semiconductor device of  claim 9 , wherein the interconnect bridge is electrically coupled to the first semiconductor die through one or more vias passing vertically through one or more layers of the substrate. 
     
     
         18 . The semiconductor device of  claim 9 , wherein the interconnect bridge is electrically coupled to the first semiconductor die through one or more pathways including both vertical vias and horizontal traces.