Inventor · disambiguated record
Michael Corwin
Also filed as: CORWIN MICHAEL · CORWIN MICHAEL P · CORWIN MICHAEL PAUL
27 granted patents·8 pending applications·1,305 citations·filing 1997–2014
98Inventor score
Top patents by PatentIndex Score
35 records- 0199US7908259B2Hardware accelerated reconfigurable processor for accelerating database operations and queriesTERADATA US INC·Filed 2007·Granted Mar 15, 2011·137 cites·28 claims
- 0298US7966343B2Accessing data in a column store database based on hardware compatible data structuresTERADATA US INC·Filed 2008·Granted Jun 21, 2011·128 cites·9 claims
- 0396US8244718B2Methods and systems for hardware acceleration of database operations and queriesCHAMDANI JOSEPH I·Filed 2007·Granted Aug 14, 2012·71 cites·58 claims
- 0495US8234267B2Hardware accelerated reconfigurable processor for accelerating database operations and queriesBRANSCOME JEREMY·Filed 2011·Granted Jul 31, 2012·26 cites·9 claims
- 0595US8229918B2Hardware accelerated reconfigurable processor for accelerating database operations and queriesBRANSCOME JEREMY·Filed 2011·Granted Jul 24, 2012·30 cites·23 claims
- 0695US7606968B2Multi-level content addressable memoryMCDATA CORP·Filed 2006·Granted Oct 20, 2009·39 cites·20 claims
- 0794US8224800B2Hardware accelerated reconfigurable processor for accelerating database operations and queriesBRANSCOME JEREMY·Filed 2011·Granted Jul 17, 2012·24 cites·28 claims
- 0893US9141670B2Methods and systems for hardware acceleration of streamed database operations and queries based on multiple hardware acceleratorsBRANSCOME JEREMY L·Filed 2011·Granted Sep 22, 2015·22 cites·38 claims
- 0991US7110394B1Packet switching apparatus including cascade ports and method for switching packetsSANERA SYSTEMS INC·Filed 2001·Granted Sep 19, 2006·98 cites·27 claims
- 1088US9542442B2Accessing data in a column store database based on hardware compatible indexing and replicated reordered columnsTERADATA US INC·Filed 2014·Granted Jan 10, 2017·11 cites·17 claims
- 1186US6985975B1Packet lockstep system and methodSANERA SYSTEMS INC·Filed 2001·Granted Jan 10, 2006·46 cites·16 claims
- 1285US6016542ADetecting long latency pipeline stalls for thread switchingINTEL CORP·Filed 1997·Granted Jan 18, 2000·139 cites·12 claims
- 1384US6550001B1Method and implementation of statistical detection of read after write and write after write hazardsINTEL CORP·Filed 1998·Granted Apr 15, 2003·107 cites·34 claims
- 1480US8862625B2Accessing data in a column store database based on hardware compatible indexing and replicated reordered columnsMEIYYAPPAN KRISHNAN·Filed 2008·Granted Oct 14, 2014·12 cites·21 claims
- 1580US6240510B1System for processing a cluster of instructions where the instructions are issued to the execution units having a priority order according to a template associated with the cluster of instructionsINTEL CORP·Filed 1998·Granted May 29, 2001·89 cites·32 claims
- 1675US6304960B1Validating prediction for branches in a cluster via comparison of predicted and condition selected tentative target addresses and validation of branch conditionsINTEL CORP·Filed 1998·Granted Oct 16, 2001·70 cites·25 claims
- 1773US9378231B2Accessing data in column store database based on hardware compatible data structuresYANG LIUXI·Filed 2011·Granted Jun 28, 2016·4 cites·20 claims
- 1871US10803066B2Methods and systems for hardware acceleration of database operations and queries for a versioned database based on multiple hardware acceleratorsSHAU JAMES·Filed 2011·Granted Oct 13, 2020·3 cites·15 claims
- 1971US6611910B2Method for processing branch operationsIDEA CORP·Filed 1998·Granted Aug 26, 2003·49 cites·15 claims
- 2068US6092188AProcessor and instruction set with predict instructionsINTEL CORP·Filed 1999·Granted Jul 18, 2000·55 cites·3 claims
- 2163US7952997B2Congestion management groupsMCDATA CORP·Filed 2006·Granted May 31, 2011·2 cites·34 claims
- 2263US6237077B1Instruction template for efficient processing clustered branch instructionsIDEA CORP·Filed 1997·Granted May 22, 2001·42 cites·7 claims
- 2359US6591359B1Speculative renaming of data-processor registersINTEL CORP·Filed 1998·Granted Jul 8, 2003·40 cites·28 claims
- 2452US6438650B1Method and apparatus for processing cache missesINTEL CORP·Filed 1998·Granted Aug 20, 2002·27 cites·12 claims
- 2551US6438682B1Method and apparatus for predicting loop exit branchesINTEL CORP·Filed 1998·Granted Aug 20, 2002·23 cites·23 claims
- 2646US9208829B2Designated memory sub-channels for computing systems and environmentsTERADATA US INC·Filed 2013·Granted Dec 8, 2015·0 cites·20 claims
- 2746US2010005077A1Methods and systems for generating query plans that are compatible for execution in hardwareKICKFIRE INC·Filed 2008·Application pending·0 cites
- 2846US2005066153A1Method for processing branch operationsFiled 2003·Application pending·0 cites
- 2944US2009097495A1Flexible virtual queuesBROCADE COMM SYSTEMS INC·Filed 2007·Application pending·0 cites
- 3043US2007268825A1Fine-grain fairness in a hierarchical switched systemCORWIN MICHAEL·Filed 2006·Application pending·0 cites
- 3142US2007258380A1Fault detection, isolation and recovery for a switch system of a computer networkMCDATA CORP·Filed 2006·Application pending·0 cites
- 3242US2010082895A1Multi-level content addressable memoryBRANSCOME JEREMY·Filed 2009·Application pending·0 cites
- 3341US2007258443A1Switch hardware and architecture for a computer networkMCDATA CORP·Filed 2006·Application pending·0 cites
- 3438US6378063B2Method and apparatus for efficiently routing dependent instructions to clustered execution unitsINTEL CORP·Filed 1998·Granted Apr 23, 2002·11 cites·11 claims
- 3537US2009250236A1Flexible mechanical packaging form factor for rack mounted computing devicesKICKFIRE INC·Filed 2008·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →