Inventor · disambiguated record
Michael Rennie
Also filed as: RENNIE II MICHAEL VINCENT · RENNIE MICHAEL
18 granted patents·2 pending applications·132 citations·filing 1999–2020
93Inventor score
Files withKIRBY CHRISTOPHER F7INFINEON TECHNOLOGIES RICHMOND3SHEA PATRICK B2CHAPUT DONALD JAMES1INFINEON TECHNOLOGES RICHMOND1
Top patents by PatentIndex Score
20 records- 0192US9780285B1Superconductor device interconnect structureKIRBY CHRISTOPHER F·Filed 2016·Granted Oct 3, 2017·12 cites·20 claims
- 0290US8409950B1Method for integrating SONOS non-volatile memory into a sub-90 nm standard CMOS foundry process flowSHEA PATRICK BRUCKNER·Filed 2011·Granted Apr 2, 2013·31 cites·18 claims
- 0385US10312141B2Preclean methodology for superconductor interconnect fabricationKIRBY CHRISTOPHER F·Filed 2016·Granted Jun 4, 2019·5 cites·16 claims
- 0485US10158062B2Superconductor device interconnectNORTHROP GRUMMAN SYSTEMS CORP·Filed 2018·Granted Dec 18, 2018·4 cites·17 claims
- 0580US10312142B2Method of forming superconductor structuresKIRBY CHRISTOPHER F·Filed 2016·Granted Jun 4, 2019·3 cites·20 claims
- 0679US10003005B2Superconductor device interconnectKIRBY CHRISTOPHER F·Filed 2016·Granted Jun 19, 2018·3 cites·15 claims
- 0778US9142546B2Method of making bipolar junction transistor by forming base epitaxy region on etched opening in DARC layerSHEA PATRICK B·Filed 2013·Granted Sep 22, 2015·4 cites·16 claims
- 0876US6927462B2Method of forming a gate contact in a semiconductor deviceINFINEON TECHNOLOGES RICHMOND·Filed 2002·Granted Aug 9, 2005·31 cites·5 claims
- 0973US10276504B2Preclean and deposition methodology for superconductor interconnectsLUU VIVIEN·Filed 2017·Granted Apr 30, 2019·3 cites·20 claims
- 1072US8551856B2Embedded capacitor and method of fabricating the sameRENNIE MICHAEL·Filed 2011·Granted Oct 8, 2013·4 cites·18 claims
- 1166US7208326B2Edge protection process for semiconductor device fabricationINFINEON TECHNOLOGIES RICHMOND·Filed 2004·Granted Apr 24, 2007·13 cites·20 claims
- 1264US10763419B2Deposition methodology for superconductor interconnectsKIRBY CHRISTOPHER F·Filed 2017·Granted Sep 1, 2020·1 cites·18 claims
- 1364US9812445B2Bipolar junction transistor device having base epitaxy region on etched opening in DARC layerSHEA PATRICK B·Filed 2015·Granted Nov 7, 2017·1 cites·3 claims
- 1457US2015107007A1Toilet seat handleCHAPUT DONALD JAMES·Filed 2013·Application pending·0 cites
- 1551US11522118B2Superconductor structure with normal metal connection to a resistor and method of making the sameKIRBY CHRISTOPHER F·Filed 2020·Granted Dec 6, 2022·0 cites·20 claims
- 1645US6174787B1Silicon corner rounding by ion implantation for shallow trench isolationWHITE OAK SEMICONDUCTOR PARTNE·Filed 1999·Granted Jan 16, 2001·14 cites·20 claims
- 1742US10608159B2Method of making a superconductor deviceKIRBY CHRISTOPHER F·Filed 2016·Granted Mar 31, 2020·0 cites·20 claims
- 1842US7402487B2Process for fabricating a semiconductor device having deep trench structuresINFINEON TECHNOLOGIES RICHMOND·Filed 2004·Granted Jul 22, 2008·3 cites·22 claims
- 1935US10985059B2Preclean and dielectric deposition methodology for superconductor interconnect fabricationWAGNER BRIAN PAUL·Filed 2018·Granted Apr 20, 2021·0 cites·18 claims
- 2035US2006105519A1DRAM on SOIINFINEON TECHNOLOGIES RICHMOND·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →