Inventor · disambiguated record
Moo Sung Chae
Also filed as: CHAE MOO-SUNG
16 granted patents·90 citations·filing 2002–2020
92Inventor score
Top patents by PatentIndex Score
16 records- 0193US9601182B2Frequency synthesis for memory input-output operationsMICRON TECHNOLOGY INC·Filed 2015·Granted Mar 21, 2017·15 cites·38 claims
- 0291US11545968B1Active suppression circuitryCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Jan 3, 2023·3 cites·20 claims
- 0390US10128965B1Coupled inverter with auto-calibrationCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Nov 13, 2018·8 cites·20 claims
- 0487US7539826B2System, device, and method for improved mirror mode operation of a semiconductor memory deviceSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted May 26, 2009·19 cites·20 claims
- 0579US9965408B2Apparatuses and methods for asymmetric input/output interface for a memoryMICRON TECHNOLOGY INC·Filed 2015·Granted May 8, 2018·2 cites·19 claims
- 0676US10545895B1Auto-zeroing receiver for memory interface devicesCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Jan 28, 2020·2 cites·20 claims
- 0774US10180920B2Apparatuses and methods for asymmetric input/output interface for a memoryMICRON TECHNOLOGY INC·Filed 2018·Granted Jan 15, 2019·1 cites·19 claims
- 0866US7298667B2Latency control circuit and method of latency controlSAMSUNG ELECTRONICS CO LTD·Filed 2005·Granted Nov 20, 2007·6 cites·50 claims
- 0965US10796746B2Frequency synthesis for memory input-output operationsMICRON TECHNOLOGY INC·Filed 2018·Granted Oct 6, 2020·1 cites·20 claims
- 1062US10387341B2Apparatuses and methods for asymmetric input/output interface for a memoryMICRON TECHNOLOGY INC·Filed 2018·Granted Aug 20, 2019·0 cites·18 claims
- 1162US6879533B2Integrated circuit memory devices including active load circuits and related methodsSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Apr 12, 2005·12 cites·24 claims
- 1258US6590421B2Semiconductor device and method of outputting data thereinSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Jul 8, 2003·8 cites·19 claims
- 1349US6992949B2Method and circuit for controlling generation of column selection line signalSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Jan 31, 2006·6 cites·22 claims
- 1447US10115449B2Frequency synthesis for memory input-output operationsMICRON TECHNOLOGY INC·Filed 2017·Granted Oct 30, 2018·0 cites·20 claims
- 1546US7257754B2Semiconductor memory device and test pattern data generating method using the sameSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Aug 14, 2007·6 cites·13 claims
- 1639US6777987B2Signal buffer for high-speed signal transmission and signal line driving circuit including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Aug 17, 2004·1 cites·45 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →