Inventor · disambiguated record
Mohan R. Nagar
Also filed as: NAGAR MOHAN · NAGAR MOHAN R
12 granted patents·6 pending applications·123 citations·filing 2002–2015
90Inventor score
Top patents by PatentIndex Score
18 records- 0197US7641776B2System and method for increasing yield from semiconductor wafer electroplatingLSI CORP·Filed 2005·Granted Jan 5, 2010·53 cites·20 claims
- 0282US9320183B1Ground lid opening on a substrateCISCO TECH INC·Filed 2013·Granted Apr 19, 2016·6 cites·25 claims
- 0376US8736044B2Lid for an electrical hardware componentAHMAD MUDASIR·Filed 2010·Granted May 27, 2014·4 cites·16 claims
- 0475US6825556B2Integrated circuit package design with non-orthogonal die cut outLSI LOGIC CORP·Filed 2002·Granted Nov 30, 2004·21 cites·7 claims
- 0570US6605954B1Reducing probe card substrate warpageLSI LOGIC CORP·Filed 2002·Granted Aug 12, 2003·16 cites·12 claims
- 0669US8952523B2Integrated circuit package lid configured for package coplanarityAHMAD MUDASIR·Filed 2010·Granted Feb 10, 2015·3 cites·14 claims
- 0759US8962388B2Method and apparatus for supporting a computer chip on a printed circuit board assemblyNAGAR MOHAN R·Filed 2011·Granted Feb 24, 2015·1 cites·10 claims
- 0856US6946866B2Measurement of package interconnect impedance using tester and supporting testerLSI LOGIC CORP·Filed 2003·Granted Sep 20, 2005·7 cites·13 claims
- 0955US7352062B2Integrated circuit package designLSI LOGIC CORP·Filed 2004·Granted Apr 1, 2008·6 cites·20 claims
- 1047US2015173177A1Method and apparatus for supporting a computer chip on a printed circuit board assemblyCISCO TECH INC·Filed 2015·Application pending·0 cites
- 1146US8081484B2Method and apparatus for supporting a computer chip on a printed circuit board assemblyNAGAR MOHAN R·Filed 2006·Granted Dec 20, 2011·0 cites·13 claims
- 1246US6891392B2Substrate impedance measurementLSI LOGIC CORP·Filed 2003·Granted May 10, 2005·3 cites·20 claims
- 1345US6717423B1Substrate impedance measurementLSI LOGIC CORP·Filed 2002·Granted Apr 6, 2004·3 cites·20 claims
- 1445US2016064320A1Coupling of an interposer to a package substrateCISCO TECH INC·Filed 2014·Application pending·0 cites
- 1537US2004069216A1Tilting pickup headFiled 2002·Application pending·0 cites
- 1636US2013284796A1System in package module assemblyNAGAR MOHAN R·Filed 2012·Application pending·0 cites
- 1735US2004239350A1Novel solution for low cost, speedy probe cardsFiled 2003·Application pending·0 cites
- 1833US2006099736A1Flip chip underfillingNAGAR MOHAN R·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →