Inventor · disambiguated record
Myoung-Kwan Cho
Also filed as: CHO MYOUNG KWAN
16 granted patents·1 pending application·471 citations·filing 1993–2024
94Inventor score
Top patents by PatentIndex Score
17 records- 0193US5789293ANonvolatile memory device and manufacturing method thereofSAMSUNG ELECTRONICS CO LTD·Filed 1996·Granted Aug 4, 1998·102 cites·2 claims
- 0290US5912488AStacked-gate flash EEPROM memory devices having mid-channel injection characteristics for high speed programmingSAMSUNG ELECTRONICS CO LTD·Filed 1997·Granted Jun 15, 1999·104 cites·9 claims
- 0389US5514889ANon-volatile semiconductor memory device and method for manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 1993·Granted May 7, 1996·95 cites·9 claims
- 0486US6847556B2Method for operating NOR type flash memory device including SONOS cellsSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Jan 25, 2005·45 cites·12 claims
- 0583US5712178ANon-volatile semiconductor memory device and method for manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 1995·Granted Jan 27, 1998·42 cites·14 claims
- 0676US2025048635A1Semiconductor memory device and method of manufacturing the sameSK HYNIX INC·Filed 2024·Application pending·0 cites
- 0773US7315055B2Silicon-oxide-nitride-oxide-silicon (SONOS) memory devices having recessed channelsSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Jan 1, 2008·18 cites·9 claims
- 0870US7547943B2Non-volatile memory devices that include a selection transistor having a recessed channel and methods of fabricating the sameSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Jun 16, 2009·15 cites·10 claims
- 0969US6544845B2Methods of fabricating nonvolatile memory devices including bird's beak oxideSAMSUNG ELECTRONICS CO LTD·Filed 2001·Granted Apr 8, 2003·17 cites·20 claims
- 1068US12171099B2Semiconductor memory device capable of connecting each of a plurality of cell strings to a source line through a discharge transistor and method of manufacturing the sameSK HYNIX INC·Filed 2021·Granted Dec 17, 2024·0 cites·14 claims
- 1167US10224102B2Semiconductor memory device and operation method thereofSK HYNIX INC·Filed 2017·Granted Mar 5, 2019·2 cites·27 claims
- 1261US7320909B2Methods of fabricating integrated circuit devices having contact holes exposing gate electrodes in active regionsSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Jan 22, 2008·2 cites·5 claims
- 1361US7034365B2Integrated circuit devices having contact holes exposing gate electrodes in active regionsSAMSUNG ELECTRONICS CO LTD·Filed 2004·Granted Apr 25, 2006·9 cites·5 claims
- 1457US6144064ASplit-gate EEPROM device having floating gate with double polysilicon layerSAMSUNG ELECTRONICS CO LTD·Filed 1999·Granted Nov 7, 2000·15 cites·5 claims
- 1551US12283323B2Memory device and method of operation with sequential discharging of word linesSK HYNIX INC·Filed 2022·Granted Apr 22, 2025·0 cites·18 claims
- 1639US10418116B2Memory device with control logic configured to group memory blocks, and determine driving voltages to be respectively applied to the groups to control memory operationSK HYNIX INC·Filed 2017·Granted Sep 17, 2019·0 cites·14 claims
- 1739US5888871AMethods of forming EEPROM memory cells having uniformly thick tunnelling oxide layersSAMSUNG ELECTRONICS CO LTD·Filed 1996·Granted Mar 30, 1999·5 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →