Nonvolatile memory device and manufacturing method thereof

Abstract

A nonvolatile memory device and a manufacturing method thereof is disclosed. The device includes a gate electrode of a memory cell arranged in a memory cell region and having a floating gate electrode formed of a first conductive layer, an insulating film formed on the floating gate electrode and a control gate electrode formed of a second conductive layer on the insulating film; a gate electrode formed of a second conductive layer and arranged in a peripheral circuit region surrounding the memory cell region; a resistance device formed of the first conductive layer arranged in a boundary region between the memory cell region and the peripheral circuit region and/or the peripheral circuit region; an insulating film formed on a part of a surface of the resistance device; and a capping layer formed of the second conductive layer on the insulating film. Thus, generation of a stringer can be prevented so that malfunction of a device can be prevented.

What is claimed is: 
     
       1. A manufacturing method of a nonvolatile memory device comprising the steps of: forming a first conductive layer on a semiconductor substrate;   forming a floating gate pattern in a memory cell region and a resistance pattern in a boundary region between said memory cell region and a peripheral circuit region by patterning said first conductive layer;   forming an insulating film on said floating gate and said resistance pattern;   forming a gate insulating film on said peripheral circuit region;   forming a second conductive layer on the insulating film and the gate insulating film;   forming a gate electrode of a nonvolatile memory device in said memory cell region and a resistance device in said boundary region by etching said second conductive layer, insulating film and first conductive layer; and   forming a capping layer exposing a surface of said resistance device, and forming a gate electrode of said peripheral circuit region wherein said forming of said capping layer and said gate electrode of said peripheral circuit region is provided by patterning said second conductive layer formed on said resistance device and said peripheral circuit region.   
     
     
       2. A manufacturing method of a nonvolatile memory device according to claim 1, wherein said first and second conductive layers are formed of polysilicon.