Inventor · disambiguated record
Naveen Cherukuri
Also filed as: CHERUKURI NAVEEN
36 granted patents·11 pending applications·389 citations·filing 2004–2024
97Inventor score
Top patents by PatentIndex Score
47 records- 0193US8046488B2Dynamically modulating link widthINTEL CORP·Filed 2004·Granted Oct 25, 2011·69 cites·34 claims
- 0292US7313712B2Link power saving stateINTEL CORP·Filed 2004·Granted Dec 25, 2007·71 cites·21 claims
- 0390US12141268B2Secure execution for multiple processor devices using trusted executing environmentsNVIDIA CORP·Filed 2021·Granted Nov 12, 2024·2 cites·23 claims
- 0489US11698869B1Computing an authentication tag for partial transfers scheduled across multiple direct memory access (DMA) enginesNVIDIA CORP·Filed 2022·Granted Jul 11, 2023·3 cites·20 claims
- 0589US7610500B2Link power saving stateINTEL CORP·Filed 2007·Granted Oct 27, 2009·17 cites·9 claims
- 0689US7493228B2Method and system for deterministic throttling for thermal managementINTEL CORP·Filed 2005·Granted Feb 17, 2009·17 cites·24 claims
- 0786US8990506B2Replacing cache lines in a cache memory based at least in part on cache coherency state informationCHERUKURI NAVEEN·Filed 2009·Granted Mar 24, 2015·17 cites·20 claims
- 0885US8831666B2Link power savings with state retentionCHERUKURI NAVEEN·Filed 2009·Granted Sep 9, 2014·11 cites·21 claims
- 0984US9424191B2Scalable coherence for multi-core processorsCHERUKURI NAVEEN·Filed 2012·Granted Aug 23, 2016·9 cites·27 claims
- 1082US9418011B2Region based technique for accurately predicting memory accessesSOARES LIVIO B·Filed 2010·Granted Aug 16, 2016·10 cites·17 claims
- 1180US10175744B2Link power savings with state retentionINTEL CORP·Filed 2017·Granted Jan 8, 2019·2 cites·20 claims
- 1279US7979234B2Method and system for deterministic throttling for thermal managementINTEL CORP·Filed 2009·Granted Jul 12, 2011·7 cites·7 claims
- 1378US7957428B2Methods and apparatuses to effect a variable-width linkINTEL CORP·Filed 2004·Granted Jun 7, 2011·26 cites·25 claims
- 1477US11720440B2Error containment for enabling local checkpoint and recoveryNVIDIA CORP·Filed 2021·Granted Aug 8, 2023·1 cites·19 claims
- 1576US10712809B2Link power savings with state retentionINTEL CORP·Filed 2019·Granted Jul 14, 2020·1 cites·20 claims
- 1676US7747888B2Technique to create link determinismINTEL CORP·Filed 2007·Granted Jun 29, 2010·6 cites·18 claims
- 1774US9588575B2Link power savings with state retentionINTEL CORP·Filed 2014·Granted Mar 7, 2017·2 cites·20 claims
- 1874US7209907B2Method and apparatus for periodically retraining a serial links interfaceINTEL CORP·Filed 2004·Granted Apr 24, 2007·18 cites·27 claims
- 1973US2025117473A1Secure execution for multiple processor devices using trusted executing environmentsNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2072US7219220B2Methods and apparatuses for resetting the physical layers of two agents interconnected through a link-based interconnectionINTEL CORP·Filed 2004·Granted May 15, 2007·16 cites·24 claims
- 2170US2025158813A1Implementing trusted executing environments across multiple processor devicesNVIDIA CORP·Filed 2024·Application pending·0 cites
- 2269US7203872B2Cache based physical layer self testINTEL CORP·Filed 2004·Granted Apr 10, 2007·14 cites·31 claims
- 2368US7965741B2Method, apparatus, and system for idle state definition for power managementINTEL CORP·Filed 2009·Granted Jun 21, 2011·3 cites·14 claims
- 2467US8683136B2Apparatus and method for improving data prefetching efficiency using history based prefetchingCHERUKURI NAVEEN·Filed 2010·Granted Mar 25, 2014·2 cites·27 claims
- 2567US7711878B2Method and apparatus for acknowledgement-based handshake mechanism for interactively training linksINTEL CORP·Filed 2004·Granted May 4, 2010·12 cites·38 claims
- 2667US7362739B2Methods and apparatuses for detecting clock failure and establishing an alternate clock laneINTEL CORP·Filed 2004·Granted Apr 22, 2008·7 cites·30 claims
- 2765US7844767B2Method for identifying bad lanes and exchanging width capabilities of two CSI agents connected across a linkINTEL CORP·Filed 2004·Granted Nov 30, 2010·10 cites·27 claims
- 2865US7328359B2Technique to create link determinismINTEL CORP·Filed 2004·Granted Feb 5, 2008·9 cites·29 claims
- 2963US12219057B2Implementing trusted executing environments across multiple processor devicesNVIDIA CORP·Filed 2021·Granted Feb 4, 2025·0 cites·23 claims
- 3063US7366964B2Method, system, and apparatus for loopback entry and exitINTEL CORP·Filed 2004·Granted Apr 29, 2008·10 cites·15 claims
- 3162US7746795B2Method, system, and apparatus for loopback parameter exchangeINTEL CORP·Filed 2004·Granted Jun 29, 2010·7 cites·19 claims
- 3259US9794349B2Dynamically modulating link widthINTEL CORP·Filed 2014·Granted Oct 17, 2017·0 cites·16 claims
- 3357US7586951B2Method, apparatus, and system for idle state definition for power managementINTEL CORP·Filed 2004·Granted Sep 8, 2009·8 cites·13 claims
- 3455US8693319B2Scheme for avoiding deadlock in multi-ring interconnect, with additional application to congestion controlCHOU CHING-TSUN·Filed 2008·Granted Apr 8, 2014·1 cites·31 claims
- 3553US12001592B2Protecting against resets by untrusted software during cryptographic operationsNVIDIA CORP·Filed 2022·Granted Jun 4, 2024·0 cites·20 claims
- 3651US2023297406A1Confidential computing using multi-instancing of parallel processorsNVIDIA CORP·Filed 2023·Application pending·0 cites
- 3751US2024406154A1Native link encryptionNVIDIA CORP·Filed 2023·Application pending·0 cites
- 3851US2023297696A1Confidential computing using parallel processors with code and data protectionNVIDIA CORP·Filed 2023·Application pending·0 cites
- 3949US11966480B2Fairly utilizing multiple contexts sharing cryptographic hardwareNVIDIA CORP·Filed 2022·Granted Apr 23, 2024·0 cites·20 claims
- 4049US8914541B2Dynamically modulating link widthCHERUKURI NAVEEN·Filed 2011·Granted Dec 16, 2014·0 cites·13 claims
- 4147US2014112145A1Scheme for avoiding deadlock in multi-ring interconnect, with additional application to congestion controlCHOU CHING-TSUN·Filed 2013·Application pending·0 cites
- 4247US2014156892A1Method, system, and apparatus for link latency managementFRODSHAM TIM·Filed 2013·Application pending·0 cites
- 4346US8204067B2Technique for lane virtualizationCHERUKURI NAVEEN·Filed 2004·Granted Jun 19, 2012·1 cites·37 claims
- 4445US2005262184A1Method and apparatus for interactively training links in a lockstep fashionCHERUKURI NAVEEN·Filed 2004·Application pending·0 cites
- 4545US2006041696A1Methods and apparatuses for the physical layer initialization of a link-based system interconnectCHERUKURI NAVEEN·Filed 2004·Application pending·0 cites
- 4645US2009254712A1Adaptive cache organization for chip multiprocessorsCHERUKURI NAVEEN·Filed 2008·Application pending·0 cites
- 4743US2006168379A1Method, system, and apparatus for link latency managementFRODSHAM TIM·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →