Inventor · disambiguated record
Nicolas Anquet
Also filed as: ANQUET NICOLAS
14 granted patents·5 pending applications·14 citations·filing 2011–2024
86Inventor score
Files withST MICROELECTRONICS ALPS SAS7ST MICROELECTRONICS GRENOBLE 24ST MICROELECTRONICS ROUSSET3ST MICROELECTRONICS INT NV2ANQUET NICOLAS1
Top patents by PatentIndex Score
19 records- 0192US11700174B2Method for managing the operation of a system on chip, and corresponding system on chipST MICROELECTRONICS ALPS SAS·Filed 2020·Granted Jul 11, 2023·4 cites·28 claims
- 0283US11876732B2Method for managing the configuration of access to peripherals and their associated resources of a system on chip, and corresponding system on chipST MICROELECTRONICS ROUSSET·Filed 2020·Granted Jan 16, 2024·2 cites·20 claims
- 0383US11610025B2Integrated circuit configured to carry out symmetric encryption operations without secret key transmissionST MICROELECTRONICS GRENOBLE 2·Filed 2021·Granted Mar 21, 2023·2 cites·19 claims
- 0471US9563778B2Method for managing public and private data input at a deviceST-ERICSSON SA·Filed 2012·Granted Feb 7, 2017·3 cites·10 claims
- 0564US11962462B2Method for managing the operation of a system on chip, and corresponding system on chipST MICROELECTRONICS ALPS SAS·Filed 2023·Granted Apr 16, 2024·0 cites·19 claims
- 0657US11914718B2Secured boot of a processing unitST MICROELECTRONICS ALPS SAS·Filed 2022·Granted Feb 27, 2024·0 cites·19 claims
- 0756US10331530B2Data protection for memory with built-in self-testST MICROELECTRONICS ALPS SAS·Filed 2016·Granted Jun 25, 2019·2 cites·21 claims
- 0855US12045377B2Method and device for secured deciphering of ciphering dataST MICROELECTRONICS ALPS SAS·Filed 2022·Granted Jul 23, 2024·0 cites·20 claims
- 0955US2024330223A1Interface circuit and methodST MICROELECTRONICS INT NV·Filed 2024·Application pending·0 cites
- 1055US2024330518A1Emulation process and circuit for a read-only memoryST MICROELECTRONICS INT NV·Filed 2024·Application pending·0 cites
- 1154US9081724B2Method and device for protecting memory content using first and second addressable storage regions and first and second encryption keysANQUET NICOLAS·Filed 2011·Granted Jul 14, 2015·1 cites·19 claims
- 1253US12045378B2Secured storage of ciphering keysST MICROELECTRONICS ALPS SAS·Filed 2022·Granted Jul 23, 2024·0 cites·20 claims
- 1352US2024176863A1System-on-chip including a resource isolation system and method for managing the corresponding resource isolationST MICROELECTRONICS ROUSSET·Filed 2023·Application pending·0 cites
- 1451US12455692B2Management of a memory firewall in a system on chipSTMICROELECTRONICS GRAND OUEST SAS·Filed 2022·Granted Oct 28, 2025·0 cites·20 claims
- 1547US11829188B2Method for managing the debugging of a system on chip forming for example a microcontroller, and corresponding system on chipST MICROELECTRONICS ROUSSET·Filed 2020·Granted Nov 28, 2023·0 cites·20 claims
- 1645US2022317184A1Secured debugST MICROELECTRONICS ALPS SAS·Filed 2022·Application pending·0 cites
- 1742US11698993B2Integrated circuit configured to perform symmetric encryption operations with secret key protectionST MICROELECTRONICS GRENOBLE 2·Filed 2021·Granted Jul 11, 2023·0 cites·12 claims
- 1842US11281807B2Processing system, related integrated circuit and methodST MICROELECTRONICS GRENOBLE 2·Filed 2019·Granted Mar 22, 2022·0 cites·19 claims
- 1940US2019179773A1Method for writing a set of information encrypted in an external memory of an integrated circuit and corresponding integrated circuitST MICROELECTRONICS GRENOBLE 2·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →