Inventor · disambiguated record
Niranjan Behera
Also filed as: BEHERA NIRANJAN
14 granted patents·156 citations·filing 2001–2023
91Inventor score
Top patents by PatentIndex Score
14 records- 0193US7139204B1Method and system for testing a dual-port memory at speed in a stressed environmentVIRAGE LOGIC CORP·Filed 2005·Granted Nov 21, 2006·42 cites·25 claims
- 0284US6396760B1Memory having a redundancy scheme to allow one fuse to blow per faulty memory columnVIRAGE LOGIC CORP·Filed 2001·Granted May 28, 2002·39 cites·30 claims
- 0378US7415641B1System and method for repairing a memoryVIRAGE LOGIC CORP·Filed 2003·Granted Aug 19, 2008·23 cites·14 claims
- 0473US6519202B1Method and apparatus to change the amount of redundant memory column and fuses associated with a memory deviceVIRAGE LOGIC CORP·Filed 2001·Granted Feb 11, 2003·20 cites·28 claims
- 0571US7031866B1System and method for testing a memoryVIRAGE LOGIC CORP·Filed 2003·Granted Apr 18, 2006·16 cites·23 claims
- 0666US7940550B2Systems and methods for reducing memory array leakage in high capacity memories by selective biasingSYNOPSYS INC·Filed 2009·Granted May 10, 2011·6 cites·21 claims
- 0763US12340865B2Reduced circuit area memory device with a half-word memory architectureSYNOPSYS INC·Filed 2023·Granted Jun 24, 2025·0 cites·20 claims
- 0858US7788551B2System and method for repairing a memoryVIRAGE LOGIC CORP·Filed 2008·Granted Aug 31, 2010·3 cites·7 claims
- 0954US11670361B2Sequential delay enabler timer circuit for low voltage operation for SRAMsSYNOPSYS INC·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 1049US6646933B1Method and apparatus to reduce the amount of redundant memory column and fuses associated with a memory deviceVIRAGE LOGIC CORP·Filed 2002·Granted Nov 11, 2003·6 cites·16 claims
- 1146US7539590B2System and method for testing a memoryVIRAGE LOGIC CORP·Filed 2006·Granted May 26, 2009·1 cites·21 claims
- 1244US11481255B2Management of memory pages for a set of non-consecutive work elements in work queue designated by a sliding window for execution on a coherent acceleratorIBM·Filed 2019·Granted Oct 25, 2022·0 cites·16 claims
- 1340US7904766B1Statistical yield of a system-on-a-chipSYNOPSYS INC·Filed 2007·Granted Mar 8, 2011·0 cites·20 claims
- 1432US9966131B2Using sense amplifier as a write booster in memory operating with a large dual rail voltage supply differentialSYNOPSYS INC·Filed 2015·Granted May 8, 2018·0 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →