Inventor · disambiguated record
Nitin Prasad
Also filed as: PRASAD NITIN
24 granted patents·2 pending applications·276 citations·filing 2000–2014
96Inventor score
Top patents by PatentIndex Score
26 records- 0196US7725738B1FPGA configuration bitstream protection using multiple keysALTERA CORP·Filed 2005·Granted May 25, 2010·52 cites·19 claims
- 0296US6628140B2Programmable logic devices with function-specific blocksALTERA CORP·Filed 2001·Granted Sep 30, 2003·108 cites·46 claims
- 0387US9208357B1FPGA configuration bitstream protection using multiple keysALTERA CORP·Filed 2014·Granted Dec 8, 2015·6 cites·18 claims
- 0479US6400635B1Memory circuitry for programmable logic integrated circuit devicesALTERA CORP·Filed 2000·Granted Jun 4, 2002·23 cites·8 claims
- 0578US7024446B2Circuitry for arithmetically accumulating a succession of arithmetic valuesALTERA CORP·Filed 2003·Granted Apr 4, 2006·14 cites·5 claims
- 0677US8209545B1FPGA configuration bitstream protection using multiple keysLANGHAMMER MARTIN·Filed 2010·Granted Jun 26, 2012·3 cites·14 claims
- 0774US7650438B2Apparatus and methods for communicating with programmable logic devicesALTERA CORP·Filed 2008·Granted Jan 19, 2010·4 cites·18 claims
- 0872US7356620B2Apparatus and methods for communicating with programmable logic devicesALTERA CORP·Filed 2003·Granted Apr 8, 2008·10 cites·17 claims
- 0971US8190787B2Apparatus and methods for communicating with programmable devicesXIA RENXIN·Filed 2009·Granted May 29, 2012·3 cites·20 claims
- 1070US6625796B1Apparatus and method for programming a set of programmable logic devices in parallelALTERA CORP·Filed 2000·Granted Sep 23, 2003·14 cites·20 claims
- 1168US6556502B2Memory circuitry for programmable logic integrated circuit devicesALTERA CORP·Filed 2002·Granted Apr 29, 2003·13 cites·26 claims
- 1267US8826038B1FPGA configuration bitstream protection using multiple keysLANGHAMMER MARTIN·Filed 2012·Granted Sep 2, 2014·1 cites·18 claims
- 1367US8615543B1Saturation and rounding in multiply-accumulate blocksZHENG LEON·Filed 2011·Granted Dec 24, 2013·2 cites·12 claims
- 1464US6707399B1Data realignment techniques for serial-to-parallel conversionALTERA CORP·Filed 2002·Granted Mar 16, 2004·10 cites·23 claims
- 1561US9274980B2Apparatus and methods for communicating with programmable devicesALTERA CORP·Filed 2014·Granted Mar 1, 2016·0 cites·20 claims
- 1659US8719458B2Apparatus and methods for communicating with programmable devicesALTERA CORP·Filed 2013·Granted May 6, 2014·0 cites·20 claims
- 1757US7991812B2Programmable logic devices with function-specific blocksALTERA CORP·Filed 2009·Granted Aug 2, 2011·0 cites·27 claims
- 1857US7467176B2Saturation and rounding in multiply-accumulate blocksALTERA CORP·Filed 2004·Granted Dec 16, 2008·4 cites·12 claims
- 1955US6911923B1Data realignment techniques for serial-to-parallel conversionALTERA CORP·Filed 2004·Granted Jun 28, 2005·6 cites·17 claims
- 2054US8554959B2Apparatus and methods for communicating with programmable devicesXIA RENXIN·Filed 2012·Granted Oct 8, 2013·0 cites·21 claims
- 2153US6981206B1Method and apparatus for generating parity valuesALTERA CORP·Filed 2002·Granted Dec 27, 2005·2 cites·21 claims
- 2253US2009100122A1Saturation and rounding in multiply-accumulate blocksALTERA CORP·Filed 2008·Application pending·0 cites
- 2350US7660841B2Flexible accumulator in digital signal processing circuitryALTERA CORP·Filed 2004·Granted Feb 9, 2010·1 cites·10 claims
- 2450US2006218216A1Programmable logic devices with function-specific blocksLANGHAMMER MARTIN·Filed 2006·Application pending·0 cites
- 2547US7574533B2Apparatus and methods for communicating with programmable logic devicesALTERA CORP·Filed 2008·Granted Aug 11, 2009·0 cites·21 claims
- 2644US9170775B2Flexible accumulator in digital signal processing circuitryZHENG LEON·Filed 2010·Granted Oct 27, 2015·0 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →