US2009100122A1PendingUtilityA1

Saturation and rounding in multiply-accumulate blocks

Assignee: ALTERA CORPPriority: Feb 20, 2004Filed: Nov 26, 2008Published: Apr 16, 2009
Est. expiryFeb 20, 2024(expired)· nominal 20-yr term from priority
G06F 7/49947G06F 7/5443G06F 7/49921G06F 7/523
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Claims

Abstract

Saturation and rounding capabilities are implemented in MAC blocks to provide rounded and saturated outputs of multipliers and of add-subtract-accumulate circuits implemented using DSP. These features support any suitable format of value representation, including the x.15 format. Circuitry within the multipliers and the add-subtract-accumulate circuits implement the rounding and saturation features of the present invention.

Claims

exact text as granted — not AI-modified
1 . A programmable logic resource comprising digital signal processing circuitry, the digital signal processing circuitry comprising:
 at least one circuit element configured with the capability to perform rounding and saturation on a respective output of the at least one circuit element.   
   
   
       2 . The programmable logic resource of  claim 1  wherein the at least one circuit element comprises at least one multiplier. 
   
   
       3 . The programmable logic resource of  claim 1  wherein the at least one circuit element comprises at least one add-subtract-accumulate circuit. 
   
   
       4 . The programmable logic resource of  claim 1  wherein the at least one circuit element comprises at least one multiplier and at least one add-subtract-accumulate circuit. 
   
   
       5 . The programmable logic resource of  claim 1  wherein the digital signal processing circuitry is a multiply-accumulate block. 
   
   
       6 . The programmable logic resource of  claim 1  wherein the at least one multiplier is configured with the capability to perform rounding and saturation based on a 1.15 format. 
   
   
       7 . A printed circuit board on which is mounted a programmable logic resource as defined in  claim 1 . 
   
   
       8 . The printed circuit board of  claim 7  further comprising a memory mounted on the printed circuit board and coupled to the programmable logic resource. 
   
   
       9 . The printed circuit board of  claim 8  further comprising processing circuitry mounted on the printed circuit board and coupled to the memory circuitry.

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