Inventor · disambiguated record
Pai-Hsiang Kao
Also filed as: KAO PAI-HSIANG
7 granted patents·819 citations·filing 1997–2001
90Inventor score
Files withNAT SEMICONDUCTOR CORP7
Top patents by PatentIndex Score
7 records- 0195US6075290ASurface mount die: wafer level chip-scale package and process for making the sameNAT SEMICONDUCTOR CORP·Filed 1998·Granted Jun 13, 2000·250 cites·18 claims
- 0295US5923995AMethods and apparatuses for singulation of microelectromechanical systemsNAT SEMICONDUCTOR CORP·Filed 1997·Granted Jul 13, 1999·258 cites·13 claims
- 0392US6023094ASemiconductor wafer having a bottom surface protective coatingNAT SEMICONDUCTOR CORP·Filed 1998·Granted Feb 8, 2000·116 cites·6 claims
- 0490US6175162B1Semiconductor wafer having a bottom surface protective coatingNAT SEMICONDUCTOR CORP·Filed 1999·Granted Jan 16, 2001·92 cites·7 claims
- 0577USRE38789ESemiconductor wafer having a bottom surface protective coatingNAT SEMICONDUCTOR CORP·Filed 2001·Granted Sep 6, 2005·19 cites·15 claims
- 0675US6327158B1Metal pads for electrical probe testing on wafer with bump interconnectsNAT SEMICONDUCTOR CORP·Filed 1999·Granted Dec 4, 2001·46 cites·15 claims
- 0771US6249044B1Opaque metallization to cover flip chip die surface for light sensitive semiconductor devicesNAT SEMICONDUCTOR CORP·Filed 1999·Granted Jun 19, 2001·38 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →