Inventor · disambiguated record
Paul W. Kollaritsch
Also filed as: KOLLARITSCH PAUL W
6 granted patents·118 citations·filing 1981–2017
82Inventor score
Files withCADENCE DESIGN SYSTEMS INC3BELL TELEPHONE LABOR INC1CANDENCE DESGIN SYSTEMS INC1KOLLARITSCH PAUL W1
Top patents by PatentIndex Score
6 records- 0190US4433331AProgrammable logic array interconnection matrixBELL TELEPHONE LABOR INC·Filed 1981·Granted Feb 21, 1984·80 cites·16 claims
- 0285US8719743B1Method and system for implementing clock tree prototypingCANDENCE DESGIN SYSTEMS INC·Filed 2012·Granted May 6, 2014·24 cites·37 claims
- 0377US10242145B1Optimizing a power grid for an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Mar 26, 2019·6 cites·16 claims
- 0473US10540470B1Generating a power grid for an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Jan 21, 2020·2 cites·18 claims
- 0572US9760667B1Method, system, and computer program product for implementing prototyping and floorplanning of electronic circuit designsCADENCE DESIGN SYSTEMS INC·Filed 2014·Granted Sep 12, 2017·3 cites·28 claims
- 0664US8707228B1Method and system for implementing hierarchical prototyping of electronic designsKOLLARITSCH PAUL W·Filed 2011·Granted Apr 22, 2014·3 cites·40 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →