Inventor · disambiguated record
Paras A. Shah
Also filed as: SHAH PARAS · SHAH PARAS A
12 granted patents·1 pending application·136 citations·filing 2000–2025
91Inventor score
Top patents by PatentIndex Score
13 records- 0181US6615295B2Relaxed read completion ordering in a system using transaction order queueHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 2, 2003·33 cites·39 claims
- 0278US6782336B2Test outputs using an idle busHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Aug 24, 2004·22 cites·43 claims
- 0371US6901467B2Enhancing a PCI-X split completion transaction by aligning cachelines with an allowable disconnect boundary's ending addressHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted May 31, 2005·20 cites·39 claims
- 0468US2025353190A1End-effector with self powered electrostatic chuckASM IP HOLDING BV·Filed 2025·Application pending·0 cites
- 0566US6889283B2Method and system to promote arbitration priority in a buffer queueHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted May 3, 2005·12 cites·23 claims
- 0665US6941407B2Method and apparatus for ordering interconnect transactions in a computer systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Sep 6, 2005·13 cites·19 claims
- 0761US7000060B2Method and apparatus for ordering interconnect transactions in a computer systemHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Feb 14, 2006·9 cites·23 claims
- 0859US7111105B2System to optimally order cycles originating from a single physical linkHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Sep 19, 2006·8 cites·36 claims
- 0958US7028116B2Enhancement of transaction order queueHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Apr 11, 2006·7 cites·27 claims
- 1057US7139965B2Bus device that concurrently synchronizes source synchronous data while performing error detection and correctionHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Nov 21, 2006·7 cites·19 claims
- 1149US6775758B2Buffer page roll implementation for PCI-X block read transactionsHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Aug 10, 2004·2 cites·32 claims
- 1248US6959398B2Universal asynchronous boundary moduleHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Oct 25, 2005·3 cites·7 claims
- 1337US8078818B2Method and system for migrating memory segmentsWALKER WILLIAM J·Filed 2005·Granted Dec 13, 2011·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →