Inventor · disambiguated record
Peter Richard Greenhalgh
Also filed as: GREENHALGH PETER R · GREENHALGH PETER RICHARD
33 granted patents·5 pending applications·111 citations·filing 2008–2021
95Inventor score
Top patents by PatentIndex Score
38 records- 0197US10394716B1Apparatus and method for controlling allocation of data into a cache storageADVANCED RISC MACH LTD·Filed 2018·Granted Aug 27, 2019·41 cites·19 claims
- 0289US10613869B2Branch target address provisionADVANCED RISC MACH LTD·Filed 2018·Granted Apr 7, 2020·9 cites·14 claims
- 0386US8533505B2Data processing apparatus and method for transferring workload between source and destination processing circuitryGREENHALGH PETER RICHARD·Filed 2010·Granted Sep 10, 2013·11 cites·29 claims
- 0483US9477479B2Instruction prefetch throttling using instruction count and branch predictionADVANCED RISC MACH LTD·Filed 2014·Granted Oct 25, 2016·7 cites·20 claims
- 0580US10049043B2Flushing control within a multi-threaded processorADVANCED RISC MACH LTD·Filed 2016·Granted Aug 14, 2018·3 cites·18 claims
- 0680US8418187B2Virtualization software migrating workload between processing circuitries while making architectural states available transparent to operating systemGREENHALGH PETER RICHARD·Filed 2010·Granted Apr 9, 2013·7 cites·19 claims
- 0778US11340901B2Apparatus and method for controlling allocation of instructions into an instruction cache storageADVANCED RISC MACH LTD·Filed 2019·Granted May 24, 2022·2 cites·13 claims
- 0876US7925866B2Data processing apparatus and method for handling instructions to be executed by processing circuitryADVANCED RISC MACH LTD·Filed 2008·Granted Apr 12, 2011·9 cites·15 claims
- 0974US9286222B2Data processing apparatus and method for transferring workload between source and destination processing circuitryADVANCED RISC MACH LTD·Filed 2013·Granted Mar 15, 2016·3 cites·31 claims
- 1074US7831815B2Data processing apparatus and method for identifying sequences of instructionsADVANCED RISC MACH LTD·Filed 2008·Granted Nov 9, 2010·6 cites·15 claims
- 1169US8635406B2Data processing apparatus and method for providing target address information for branch instructionsGREENHALGH PETER R·Filed 2012·Granted Jan 21, 2014·4 cites·17 claims
- 1269US8347067B2Instruction pre-decoding of multiple instruction setsADVANCED RISC MACH LTD·Filed 2008·Granted Jan 1, 2013·4 cites·19 claims
- 1365US10705587B2Mode switching in dependence upon a number of active threadsADVANCED RISC MACH LTD·Filed 2016·Granted Jul 7, 2020·1 cites·17 claims
- 1462US11579879B2Processing pipeline with first and second processing modes having different performance or energy consumption characteristicsADVANCED RISC MACH LTD·Filed 2021·Granted Feb 14, 2023·0 cites·14 claims
- 1561US7917735B2Data processing apparatus and method for pre-decoding instructionsADVANCED RISC MACH LTD·Filed 2008·Granted Mar 29, 2011·2 cites·11 claims
- 1661US7747839B2Data processing apparatus and method for handling instructions to be executed by processing circuitryADVANCED RISC MACH LTD·Filed 2008·Granted Jun 29, 2010·2 cites·11 claims
- 1759US11074080B2Apparatus and branch prediction circuitry having first and second branch prediction schemes, and methodADVANCED RISC MACH LTD·Filed 2020·Granted Jul 27, 2021·0 cites·9 claims
- 1856US12182261B2Controlling use of data determined by a resolve-pending speculative operationADVANCED RISC MACH LTD·Filed 2019·Granted Dec 31, 2024·0 cites·19 claims
- 1954US11275607B2Improving the responsiveness of an apparatus to certain interruptsADVANCED RISC MACH LTD·Filed 2020·Granted Mar 15, 2022·0 cites·22 claims
- 2053US11526615B2Speculative side-channel hint instructionADVANCED RISC MACH LTD·Filed 2019·Granted Dec 13, 2022·0 cites·17 claims
- 2152US11803388B2Apparatus and method for predicting source operand values and optimized processing of instructionsADVANCED RISC MACH LTD·Filed 2019·Granted Oct 31, 2023·0 cites·20 claims
- 2252US11397584B2Tracking speculative data cachingADVANCED RISC MACH LTD·Filed 2019·Granted Jul 26, 2022·0 cites·11 claims
- 2352US11392383B2Apparatus and method for prefetching data itemsADVANCED RISC MACH LTD·Filed 2019·Granted Jul 19, 2022·0 cites·13 claims
- 2452US11126714B2Encoding of input to storage circuitryADVANCED RISC MACH LTD·Filed 2018·Granted Sep 21, 2021·0 cites·29 claims
- 2550US2016357561A1Apparatus having processing pipeline with first and second execution circuitry, and methodADVANCED RISC MACH LTD·Filed 2016·Application pending·0 cites
- 2649US8037286B2Data processing apparatus and method for instruction pre-decodingADVANCED RISC MACH LTD·Filed 2008·Granted Oct 11, 2011·0 cites·11 claims
- 2749US2018150297A1Processing pipeline with first and second processing modes having different performance or energy consumption characteristicsADVANCED RISC MACH LTD·Filed 2016·Application pending·0 cites
- 2848US11263133B2Cache control in presence of speculative read operationsADVANCED RISC MACH LTD·Filed 2019·Granted Mar 1, 2022·0 cites·14 claims
- 2946US9213547B2Processor and method for processing instructions using at least one processing pipelineADVANCED RISC MACH LTD·Filed 2013·Granted Dec 15, 2015·0 cites·18 claims
- 3046US9075622B2Reducing errors in pre-decode cachesGREENHALGH PETER RICHARD·Filed 2008·Granted Jul 7, 2015·0 cites·24 claims
- 3146US2014365751A1Operand generation in at least one processing pipelineADVANCED RISC MACH LTD·Filed 2014·Application pending·0 cites
- 3245US9348598B2Data processing apparatus and method for pre-decoding instructions to be executed by processing circuitryADVANCED RISC MACH LTD·Filed 2013·Granted May 24, 2016·0 cites·17 claims
- 3345US2020410088A1Micro-instruction cache annotations to indicate speculative side-channel risk condition for read instructionsADVANCED RISC MACH LTD·Filed 2019·Application pending·0 cites
- 3443US9952871B2Controlling execution of instructions for a processing pipeline having first out-of order execution circuitry and second execution circuitryADVANCED RISC MACH LTD·Filed 2015·Granted Apr 24, 2018·0 cites·18 claims
- 3542US10402203B2Determining a predicted behaviour for processing of instructionsADVANCED RISC MACH LTD·Filed 2016·Granted Sep 3, 2019·0 cites·19 claims
- 3641US10095518B2Allowing deletion of a dispatched instruction from an instruction queue when sufficient processor resources are predicted for that instructionADVANCED RISC MACH LTD·Filed 2015·Granted Oct 9, 2018·0 cites·18 claims
- 3741US7925867B2Pre-decode checking for pre-decoded instructions that cross cache line boundariesADVANCED RISC MACH LTD·Filed 2009·Granted Apr 12, 2011·0 cites·10 claims
- 3840US2011213935A1Data processing apparatus and method for switching a workload between first and second processing circuitryADVANCED RISC MACH LTD·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →