Inventor · disambiguated record
Peter Pius Gutberlet
Also filed as: GUTBERLET PETER · GUTBERLET PETER P · GUTBERLET PETER PIUS
18 granted patents·3 pending applications·336 citations·filing 2001–2017
95Inventor score
Files withGUTBERLET PETER PIUS5MENTOR GRAPHICS CORP4BURNETTE DAVID GAINES3WATERS SIMON JOSHUA3PRAKASH SHIV2
Top patents by PatentIndex Score
21 records- 0192US7844944B2Hierarchical presentation techniques for a design toolMENTOR GRAPHICS CORP·Filed 2006·Granted Nov 30, 2010·28 cites·20 claims
- 0292US7712050B2Hierarchical presentation techniques for a design toolGUTBERLET PETER PIUS·Filed 2006·Granted May 4, 2010·28 cites·31 claims
- 0391US6701501B2Structured algorithmic programming language approach to system designFiled 2001·Granted Mar 2, 2004·73 cites·37 claims
- 0490US7120879B2Hierarchical presentation techniques for a design toolGUTBERLET PETER PIUS·Filed 2001·Granted Oct 10, 2006·52 cites·56 claims
- 0589US9817929B1Formal verification using microtransactionsCALYPTO DESIGN SYSTEMS INC·Filed 2015·Granted Nov 14, 2017·10 cites·32 claims
- 0687US10515168B1Formal verification using microtransactionsMENTOR GRAPHICS CORP·Filed 2017·Granted Dec 24, 2019·6 cites·20 claims
- 0785US8205175B2Structured algorithmic programming language approach to system designWATERS SIMON JOSHUA·Filed 2007·Granted Jun 19, 2012·14 cites·17 claims
- 0877US7310787B2Array transformation in a behavioral synthesis toolPRAKASH SHIV·Filed 2003·Granted Dec 18, 2007·29 cites·44 claims
- 0976US7840931B2Loop manipulation if a behavioral synthesis toolMENTOR GRAPHICS CORP·Filed 2008·Granted Nov 23, 2010·8 cites·14 claims
- 1076US7302670B2Interactive interface resource allocation in a behavioral synthesis toolBOWYER BRYAN DARRELL·Filed 2002·Granted Nov 27, 2007·22 cites·26 claims
- 1175US7308672B2Structured algorithmic programming language approach to system designWATERS SIMON JOSHUA·Filed 2004·Granted Dec 11, 2007·19 cites·15 claims
- 1275US6817007B2Interactive loop configuration in a behavioral synthesis toolBURNETTE DAVID GAINES·Filed 2002·Granted Nov 9, 2004·20 cites·27 claims
- 1371US7353491B2Optimization of memory accesses in a circuit designGUTBERLET PETER PIUS·Filed 2005·Granted Apr 1, 2008·6 cites·14 claims
- 1467US8146030B2Interactive loop configuration in a behavioral synthesis toolBURNETTE DAVID GAINES·Filed 2009·Granted Mar 27, 2012·3 cites·20 claims
- 1567US7831938B2Interactive interface resource allocation in a behavioral synthesis toolMENTOR GRAPHICS CORP·Filed 2007·Granted Nov 9, 2010·3 cites·35 claims
- 1666US7412684B2Loop manipulation in a behavioral synthesis toolGUTBERLET PETER PIUS·Filed 2004·Granted Aug 12, 2008·12 cites·27 claims
- 1753US7496864B2Interactive loop configuration in a behavioral synthesis toolBURNETTE DAVID GAINES·Filed 2004·Granted Feb 24, 2009·3 cites·40 claims
- 1848US2008172646A1Array transformation in a behavioral synthesis toolPRAKASH SHIV·Filed 2007·Application pending·0 cites
- 1946US2009132979A1Dynamic pointer dereferencing and conversion to static hardwareWATERS SIMON JOSHUA·Filed 2008·Application pending·0 cites
- 2042US8522197B2Hierarchical presentation techniques for a design toolGUTBERLET PETER PIUS·Filed 2010·Granted Aug 27, 2013·0 cites·19 claims
- 2138US2011179395A1Distributed Pipeline Synthesis for High Level Electronic DesignSMIRNOV MAXIM·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →