Inventor · disambiguated record
Peter R. Harper
Also filed as: HARPER PETER · HARPER PETER R
26 granted patents·12 pending applications·637 citations·filing 2002–2019
96Inventor score
Files withTEXAS INSTRUMENTS INC9FREESCALE SEMICONDUCTOR INC8MAXIM INTEGRATED PRODUCTS8HARPER PETER R3APPLE INC2
Top patents by PatentIndex Score
38 records- 0196US6812580B1Semiconductor package having optimized wire bond positioningFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Nov 2, 2004·117 cites·30 claims
- 0295US9324687B1Wafer-level passive device integrationMAXIM INTEGRATED PRODUCTS·Filed 2013·Granted Apr 26, 2016·26 cites·20 claims
- 0395US6998952B2Inductive device including bond wiresFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Feb 14, 2006·137 cites·26 claims
- 0494US9322901B2Multichip wafer level package (WLP) optical deviceMAXIM INTEGRATED PRODUCTS·Filed 2013·Granted Apr 26, 2016·19 cites·26 claims
- 0594US6844631B2Semiconductor device having a bond pad and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2002·Granted Jan 18, 2005·161 cites·11 claims
- 0690US9726689B1Wafer level micro-electro-mechanical systems package with accelerometer and gyroscopeMAXIM INTEGRATED PRODUCTS·Filed 2013·Granted Aug 8, 2017·12 cites·6 claims
- 0789US7138328B2Packaged IC using insulated wireFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Nov 21, 2006·46 cites·23 claims
- 0883US6937047B2Integrated circuit with test pad structure and method of testingFREESCALE SEMICONDUCTOR INC·Filed 2003·Granted Aug 30, 2005·36 cites·38 claims
- 0982US8049320B2Integrated circuit stacked package precursors and stacked packaged devices and systems therefromTEXAS INSTRUMENTS INC·Filed 2009·Granted Nov 1, 2011·9 cites·11 claims
- 1077US8674505B2Integrated circuit packaging with ball grid array having differential pitch to enhance thermal performanceRHYNER KENNETH R·Filed 2012·Granted Mar 18, 2014·7 cites·16 claims
- 1176US7919860B2Semiconductor device having wafer level chip scale packaging substrate decouplingTEXAS INSTRUMENTS INC·Filed 2008·Granted Apr 5, 2011·8 cites·18 claims
- 1276US6921979B2Semiconductor device having a bond pad and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2002·Granted Jul 26, 2005·27 cites·33 claims
- 1374US8377746B2Integrated circuit stacked package precursors and stacked packaged devices and systems therefromTEXAS INSTRUMENTS INC·Filed 2011·Granted Feb 19, 2013·3 cites·2 claims
- 1473US10993317B2Wafer level optical moduleAPPLE INC·Filed 2019·Granted Apr 27, 2021·2 cites·20 claims
- 1573US8878350B1Semiconductor device having a buffer material and stiffenerMAXIM INTEGRATED PRODUCTS·Filed 2013·Granted Nov 4, 2014·3 cites·20 claims
- 1670US7271013B2Semiconductor device having a bond pad and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2004·Granted Sep 18, 2007·17 cites·18 claims
- 1766US8053349B2BGA package with traces for plating pads under the chipTEXAS INSTRUMENTS INC·Filed 2008·Granted Nov 8, 2011·3 cites·13 claims
- 1865US9806047B2Wafer level device and method with cantilever pillar structureMAXIM INTEGRATED PRODUCTS·Filed 2014·Granted Oct 31, 2017·1 cites·17 claims
- 1963US9087779B2Multi-die, high current wafer level packageMAXIM INTEGRATED PRODUCTS·Filed 2013·Granted Jul 21, 2015·1 cites·11 claims
- 2049US8828799B2Method of forming an integrated circuit package including a direct connect pad, a blind via, and a bond pad electrically coupled to the direct connect padTEXAS INSTRUMENTS INC·Filed 2013·Granted Sep 9, 2014·0 cites·2 claims
- 2148US9837368B2Enhanced board level reliability for wafer level packagesMAXIM INTEGRATED PRODUCTS·Filed 2014·Granted Dec 5, 2017·0 cites·17 claims
- 2247US9230903B2Multi-die, high current wafer level packageMAXIM INTEGRATED PRODUCTS·Filed 2015·Granted Jan 5, 2016·0 cites·4 claims
- 2345US10811400B2Wafer level optical moduleAPPLE INC·Filed 2019·Granted Oct 20, 2020·0 cites·20 claims
- 2445US7015585B2Packaged integrated circuit having wire bonds and method thereforFREESCALE SEMICONDUCTOR INC·Filed 2002·Granted Mar 21, 2006·2 cites·8 claims
- 2544US2009166889A1Packaged integrated circuits having surface mount devices and methods to form packaged integrated circuitsMURUGAN RAJEN·Filed 2007·Application pending·0 cites
- 2644US2009289362A1Low Inductance Ball Grid Array Device Having Chip Bumps on Substrate ViasTEXAS INSTRUMENTS INC·Filed 2008·Application pending·0 cites
- 2744US2009032939A1Method of forming a stud bump over passivation, and related deviceTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 2843US2008258285A1Simplified Substrates for Semiconductor Devices in Package-on-Package ProductsTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 2943US2010006987A1Integrated circuit package with emi shieldMURUGAN RAJEN·Filed 2008·Application pending·0 cites
- 3042US2009140419A1Extended plating trace in flip chip solder mask windowRHYNER KENNETH·Filed 2007·Application pending·0 cites
- 3140US2012013003A1Bga package with traces for plating pads under the chipRHYNER KENNETH R·Filed 2011·Application pending·0 cites
- 3239US8598048B2Integrated circuit package including a direct connect pad, a blind via, and a bond pad electrically coupled to the direct connect padRHYNER KENNETH ROBERT·Filed 2011·Granted Dec 3, 2013·0 cites·3 claims
- 3339US2007029661A1Power plane design and jumper wire bond for voltage drop minimizationTEXAS INSTRUMENTS INC·Filed 2005·Application pending·0 cites
- 3439US2004119172A1Packaged IC using insulated wireFiled 2002·Application pending·0 cites
- 3538US2009315156A1Packaged integrated circuit having conformal electromagnetic shields and methods to form the sameHARPER PETER R·Filed 2008·Application pending·0 cites
- 3635US2007031996A1Packaged integrated circuit having a heat spreader and method thereforCHOPIN SHEILA F·Filed 2004·Application pending·0 cites
- 3734US9564415B2Semiconductor package device having passive energy componentsHARPER PETER R·Filed 2012·Granted Feb 7, 2017·0 cites·13 claims
- 3834US2014077355A1Three-dimensional semiconductor package device having enhanced securityHARPER PETER R·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →