Inventor · disambiguated record
Pietro Montanini
Also filed as: MONTANINI PIETRO
56 granted patents·9 pending applications·376 citations·filing 1998–2024
98Inventor score
Files withIBM23ST MICROELECTRONICS SRL20GLOBALFOUNDRIES INC8MONTANINI PIETRO6ST MICROELECTRONICS INC5
Top patents by PatentIndex Score
65 records- 0198US9984936B1Methods of forming an isolated nano-sheet transistor device and the resulting deviceGLOBALFOUNDRIES INC·Filed 2017·Granted May 29, 2018·91 cites·20 claims
- 0297US10109533B1Nanosheet devices with CMOS epitaxy and method of formingGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 23, 2018·23 cites·10 claims
- 0394US9806078B1FinFET spacer formation on gate sidewalls, between the channel and source/drain regionsGLOBALFOUNDRIES INC·Filed 2016·Granted Oct 31, 2017·9 cites·17 claims
- 0492US10103245B2Embedded shape sige for strained channel transistorsST MICROELECTRONICS INC·Filed 2017·Granted Oct 16, 2018·6 cites·25 claims
- 0591US10366931B2Nanosheet devices with CMOS epitaxy and method of formingGLOBALFOUNDRIES INC·Filed 2018·Granted Jul 30, 2019·6 cites·15 claims
- 0691US7629645B2Folded-gate MOS transistorST MICROELECTRONICS SRL·Filed 2006·Granted Dec 8, 2009·24 cites·21 claims
- 0790US10388760B1Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanismIBM·Filed 2018·Granted Aug 20, 2019·4 cites·11 claims
- 0889US11183583B2Vertical transport FET with bottom source and drain extensionsIBM·Filed 2020·Granted Nov 23, 2021·2 cites·14 claims
- 0988US10699965B1Removal of epitaxy defects in transistorsIBM·Filed 2019·Granted Jun 30, 2020·4 cites·20 claims
- 1087US10431663B2Method of forming integrated circuit with gate-all-around field effect transistor and the resulting structureGLOBALFOUNDRIES INC·Filed 2018·Granted Oct 1, 2019·4 cites·20 claims
- 1185US10636694B2Dielectric isolation in gate-all-around devicesIBM·Filed 2019·Granted Apr 28, 2020·3 cites·20 claims
- 1283US11387319B2Nanosheet transistor device with bottom isolationIBM·Filed 2019·Granted Jul 12, 2022·2 cites·20 claims
- 1382US10453736B2Dielectric isolation in gate-all-around devicesIBM·Filed 2017·Granted Oct 22, 2019·3 cites·18 claims
- 1482US9000564B2Precision polysilicon resistorsST MICROELECTRONICS INC·Filed 2012·Granted Apr 7, 2015·6 cites·20 claims
- 1581US8987827B2Prevention of faceting in epitaxial source drain transistorsST MICROELECTRONICS INC·Filed 2013·Granted Mar 24, 2015·6 cites·44 claims
- 1679US10916627B2Nanosheet transistor with fully isolated source and drain regions and spacer pinch offIBM·Filed 2019·Granted Feb 9, 2021·2 cites·11 claims
- 1779US10741675B2Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanismIBM·Filed 2019·Granted Aug 11, 2020·1 cites·11 claims
- 1876US9245955B2Embedded shape SiGe for strained channel transistorsST MICROELECTRONICS INC·Filed 2013·Granted Jan 26, 2016·2 cites·13 claims
- 1976USRE41889EProcess for manufacturing high-sensitivity accelerometric and gyroscopic integrated sensors, and sensor thus producedST MICROELECTRONICS SRL·Filed 2003·Granted Oct 26, 2010·16 cites·20 claims
- 2076US6331444B1Method for manufacturing integrated devices including electromechanical microstructures, without residual stressST MICROELECTRONICS SRL·Filed 2000·Granted Dec 18, 2001·22 cites·10 claims
- 2175US7635896B2SOI device with contact trenches formed during epitaxial growingST MICROELECTRONICS SRL·Filed 2007·Granted Dec 22, 2009·5 cites·7 claims
- 2272US11201089B2Robust low-k bottom spacer for VFETIBM·Filed 2019·Granted Dec 14, 2021·1 cites·3 claims
- 2370US6387725B1Production method for integrated angular speed sensor deviceST MICROELECTRONICS SRL·Filed 2001·Granted May 14, 2002·15 cites·10 claims
- 2468US11575022B2Vertical field-effect transistor late gate recess process with improved inter-layer dielectric protectionIBM·Filed 2020·Granted Feb 7, 2023·0 cites·20 claims
- 2568US7645076B2Coupling structure for optical fibres and process for making itPIRELLI & C SPA·Filed 2003·Granted Jan 12, 2010·12 cites·42 claims
- 2668US2022367626A1Nanosheet transistor device with bottom isolationIBM·Filed 2022·Application pending·0 cites
- 2767US10756203B2Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanismIBM·Filed 2019·Granted Aug 25, 2020·0 cites·11 claims
- 2865US8486741B2Process for etching trenches in an integrated optical deviceMONTANINI PIETRO·Filed 2012·Granted Jul 16, 2013·2 cites·20 claims
- 2964US10553705B2Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanismIBM·Filed 2018·Granted Feb 4, 2020·0 cites·6 claims
- 3064US10546945B2Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanismIBM·Filed 2018·Granted Jan 28, 2020·0 cites·4 claims
- 3162US11777034B2Hybrid complementary field effect transistor deviceIBM·Filed 2021·Granted Oct 3, 2023·0 cites·20 claims
- 3262US8476143B2Deep contacts of integrated electronic devices based on regions implanted through trenchesMONTANINI PIETRO·Filed 2012·Granted Jul 2, 2013·1 cites·20 claims
- 3360US12432960B2Wraparound contact with reduced distance to channelIBM·Filed 2021·Granted Sep 30, 2025·0 cites·20 claims
- 3460US2025203999A1Substrate-less passive device solution for backside power distribution networkIBM·Filed 2023·Application pending·0 cites
- 3559US7572703B2Method for manufacturing a vertical-gate MOS transistor with countersunk trench-gateST MICROELECTRONICS SRL·Filed 2006·Granted Aug 11, 2009·2 cites·35 claims
- 3659US6090638AProcess for manufacturing high-sensitivity capacitive and resonant integrated sensors, particularly accelerometers and gyroscopes, and sensors made therefromST MICROELECTRONICS SRL·Filed 1998·Granted Jul 18, 2000·20 cites·13 claims
- 3758US10790393B2Utilizing multilayer gate spacer to reduce erosion of semiconductor Fin during spacer patterningIBM·Filed 2019·Granted Sep 29, 2020·0 cites·20 claims
- 3858US7605015B2Process for the singulation of integrated devices in thin semiconductor chipsST MICROELECTRONICS SRL·Filed 2006·Granted Oct 20, 2009·1 cites·29 claims
- 3958US2025275204A1Gate-all-around field effect transistor with variable channel geometriesIBM·Filed 2024·Application pending·0 cites
- 4057US12176404B2Wrap-around contact for nanosheet deviceIBM·Filed 2021·Granted Dec 24, 2024·0 cites·20 claims
- 4157US10937890B2Vertical field-effect transistor late gate recess process with improved inter-layer dielectric protectionIBM·Filed 2019·Granted Mar 2, 2021·0 cites·8 claims
- 4255US9755051B2Embedded shape sige for strained channel transistorsST MICROELECTRONICS INC·Filed 2015·Granted Sep 5, 2017·0 cites·24 claims
- 4354US6184052B1Process for manufacturing high-sensitivity capacitive and resonant integrated sensors, particularly accelerometers and gyroscopes, and sensors made therefromST MICROELECTRONICS SRL·Filed 1999·Granted Feb 6, 2001·16 cites·9 claims
- 4453US8115314B2Deep contacts of integrated electronic devices based on regions implanted through trenchesMONTANINI PIETRO·Filed 2008·Granted Feb 14, 2012·0 cites·33 claims
- 4552US10243079B2Utilizing multilayer gate spacer to reduce erosion of semiconductor fin during spacer patterningIBM·Filed 2017·Granted Mar 26, 2019·0 cites·16 claims
- 4652US6559035B2Method for manufacturing an SOI waferST MICROELECTRONICS SRL·Filed 2002·Granted May 6, 2003·5 cites·26 claims
- 4752US6527961B1Method of manufacturing pressure microsensorsSGS THOMSON MICROELECTRONICS·Filed 1998·Granted Mar 4, 2003·15 cites·23 claims
- 4852US6209394B1Integrated angular speed sensor device and production method thereofST MICROELECTRONICS SRL·Filed 1998·Granted Apr 3, 2001·18 cites·14 claims
- 4951US8183098B2SOI device with contact trenches formed during epitaxial growingMONTANINI PIETRO·Filed 2009·Granted May 22, 2012·0 cites·7 claims
- 5050US6395618B2Method for manufacturing integrated structures including removing a sacrificial regionST MICROELECTRONICS SRL·Filed 2000·Granted May 28, 2002·5 cites·16 claims
Showing the top 50 of 65 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →