Inventor · disambiguated record
Pouya Hashemi
Also filed as: HASHEMI POUYA
581 granted patents·22 pending applications·3,933 citations·filing 2012–2024
99Inventor score
Files withIBM573GLOBALFOUNDRIES INC21GLOBALFOUNDRIES US 2 LLC3ELPIS TECH INC2SAMSUNG ELECTRONICS CO LTD2
Top patents by PatentIndex Score
603 records- 0199US11980039B2Wide-base magnetic tunnel junction device with sidewall polymer spacerIBM·Filed 2021·Granted May 7, 2024·7 cites·20 claims
- 0299US10763177B1I/O device for gate-all-around transistorsIBM·Filed 2019·Granted Sep 1, 2020·40 cites·20 claims
- 0399US10490559B1Gate formation scheme for nanosheet transistors having different work function metals and different nanosheet width dimensionsIBM·Filed 2018·Granted Nov 26, 2019·71 cites·16 claims
- 0499US10236217B1Stacked field-effect transistors (FETs) with shared and non-shared gatesIBM·Filed 2017·Granted Mar 19, 2019·50 cites·17 claims
- 0599US9893207B1Programmable read only memory (ROM) integrated in tight pitch vertical transistor structuresIBM·Filed 2017·Granted Feb 13, 2018·33 cites·20 claims
- 0699US9837414B1Stacked complementary FETs featuring vertically stacked horizontal nanowiresIBM·Filed 2016·Granted Dec 5, 2017·173 cites·20 claims
- 0799US9773913B1Vertical field effect transistor with wrap around metallic bottom contact to improve contact resistanceIBM·Filed 2016·Granted Sep 26, 2017·87 cites·20 claims
- 0899US9659963B2Contact formation to 3D monolithic stacked FinFETsIBM·Filed 2015·Granted May 23, 2017·79 cites·20 claims
- 0999US9653289B1Fabrication of nano-sheet transistors with different threshold voltagesIBM·Filed 2016·Granted May 16, 2017·148 cites·14 claims
- 1099US9647123B1Self-aligned sigma extension regions for vertical transistorsIBM·Filed 2016·Granted May 9, 2017·43 cites·20 claims
- 1199US9647112B1Fabrication of strained vertical P-type field effect transistors by bottom condensationIBM·Filed 2016·Granted May 9, 2017·47 cites·20 claims
- 1299US9570551B1Replacement III-V or germanium nanowires by unilateral confined epitaxial growthIBM·Filed 2016·Granted Feb 14, 2017·87 cites·10 claims
- 1399US9525064B1Channel-last replacement metal-gate vertical field effect transistorIBM·Filed 2015·Granted Dec 20, 2016·62 cites·5 claims
- 1499US9443982B1Vertical transistor with air gap spacersIBM·Filed 2016·Granted Sep 13, 2016·93 cites·20 claims
- 1599US9425291B1Stacked nanosheets by aspect ratio trappingIBM·Filed 2015·Granted Aug 23, 2016·39 cites·9 claims
- 1699US9356027B1Dual work function integration for stacked FinFETIBM·Filed 2015·Granted May 31, 2016·40 cites·9 claims
- 1799US8969934B1Gate-all-around nanowire MOSFET and method of formationIBM·Filed 2013·Granted Mar 3, 2015·326 cites·4 claims
- 1898US11205698B2Multiple work function nanosheet transistors with inner spacer modulationIBM·Filed 2020·Granted Dec 21, 2021·6 cites·20 claims
- 1998US10825921B2Lateral bipolar junction transistor with controlled junctionIBM·Filed 2018·Granted Nov 3, 2020·22 cites·6 claims
- 2098US10734286B1Multiple dielectrics for gate-all-around transistorsIBM·Filed 2019·Granted Aug 4, 2020·32 cites·17 claims
- 2198US10553696B2Full air-gap spacers for gate-all-around nanosheet field effect transistorsIBM·Filed 2017·Granted Feb 4, 2020·21 cites·17 claims
- 2298US10381438B2Vertically stacked NFETS and PFETS with gate-all-around structureIBM·Filed 2017·Granted Aug 13, 2019·25 cites·11 claims
- 2398US10374039B1Enhanced field bipolar resistive RAM integrated with FDSOI technologyIBM·Filed 2018·Granted Aug 6, 2019·28 cites·20 claims
- 2498US10319846B1Multiple work function nanosheet field-effect transistors with differential interfacial layer thicknessIBM·Filed 2018·Granted Jun 11, 2019·28 cites·10 claims
- 2598US10269869B1High-density field-enhanced ReRAM integrated with vertical transistorsIBM·Filed 2017·Granted Apr 23, 2019·22 cites·19 claims
- 2698US9953973B1Diode connected vertical transistorIBM·Filed 2017·Granted Apr 24, 2018·23 cites·10 claims
- 2798US9876015B1Tight pitch inverter using vertical transistorsIBM·Filed 2017·Granted Jan 23, 2018·31 cites·8 claims
- 2898US9871140B1Dual strained nanosheet CMOS and methods for fabricatingIBM·Filed 2017·Granted Jan 16, 2018·37 cites·19 claims
- 2998US9859420B1Tapered vertical FET having III-V channelIBM·Filed 2016·Granted Jan 2, 2018·22 cites·10 claims
- 3098US9812575B1Contact formation for stacked FinFETsGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 7, 2017·25 cites·17 claims
- 3198US9799777B1Floating gate memory in a channel last vertical FET flowIBM·Filed 2016·Granted Oct 24, 2017·23 cites·20 claims
- 3298US9780100B1Vertical floating gate memory with variable channel doping profileIBM·Filed 2016·Granted Oct 3, 2017·26 cites·6 claims
- 3398US9780088B1Co-fabrication of vertical diodes and fin field effect transistors on the same substrateIBM·Filed 2016·Granted Oct 3, 2017·29 cites·14 claims
- 3498US9761726B1Vertical field effect transistor with undercut buried insulating layer to improve contact resistanceIBM·Filed 2016·Granted Sep 12, 2017·24 cites·10 claims
- 3598US9728542B1High density programmable e-fuse co-integrated with vertical FETsIBM·Filed 2016·Granted Aug 8, 2017·37 cites·16 claims
- 3698US9673307B1Lateral bipolar junction transistor with abrupt junction and compound buried oxideIBM·Filed 2016·Granted Jun 6, 2017·25 cites·20 claims
- 3798US9653465B1Vertical transistors having different gate lengthsIBM·Filed 2016·Granted May 16, 2017·35 cites·16 claims
- 3898US9640667B1III-V vertical field effect transistors with tunable bandgap source/drain regionsIBM·Filed 2016·Granted May 2, 2017·32 cites·18 claims
- 3998US9570356B1Multiple gate length vertical field-effect-transistorsIBM·Filed 2015·Granted Feb 14, 2017·40 cites·12 claims
- 4098US9472555B1Nanosheet CMOS with hybrid orientationIBM·Filed 2015·Granted Oct 18, 2016·27 cites·10 claims
- 4198US9472628B2Heterogeneous source drain region and extension regionIBM·Filed 2014·Granted Oct 18, 2016·31 cites·20 claims
- 4298US9437502B1Method to form stacked germanium nanowires and stacked III-V nanowiresIBM·Filed 2015·Granted Sep 6, 2016·29 cites·20 claims
- 4398US9425293B1Stacked nanowires with multi-threshold voltage solution for pFETsIBM·Filed 2015·Granted Aug 23, 2016·36 cites·10 claims
- 4498US9385218B1Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxyIBM·Filed 2015·Granted Jul 5, 2016·32 cites·7 claims
- 4598US9362383B1Highly scaled tunnel FET with tight pitch and method to fabricate sameIBM·Filed 2015·Granted Jun 7, 2016·31 cites·15 claims
- 4698US9349868B1Gate all-around FinFET device and a method of manufacturing sameIBM·Filed 2015·Granted May 24, 2016·23 cites·19 claims
- 4798US9257527B2Nanowire transistor structures with merged source/drain regions using auxiliary pillarsIBM·Filed 2014·Granted Feb 9, 2016·36 cites·10 claims
- 4898US9219154B1Method of fabricating electrostatically enhanced fins and stacked nanowire field effect transistorsIBM·Filed 2014·Granted Dec 22, 2015·46 cites·7 claims
- 4998US9196479B1Method of co-integration of strained silicon and strained germanium in semiconductor devices including fin structuresIBM·Filed 2014·Granted Nov 24, 2015·40 cites·20 claims
- 5098US8900951B1Gate-all-around nanowire MOSFET and method of formationIBM·Filed 2013·Granted Dec 2, 2014·38 cites·15 claims
Showing the top 50 of 603 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →