Inventor · disambiguated record
Polychronis Xekalakis
Also filed as: XEKALAKIS POLYCHRONIS
17 granted patents·12 pending applications·24 citations·filing 2011–2024
89Inventor score
Technology areasG06F
Top patents by PatentIndex Score
29 records- 0188US10324724B2Hardware apparatuses and methods to fuse instructionsINTEL CORP·Filed 2015·Granted Jun 18, 2019·7 cites·24 claims
- 0278US10409763B2Apparatus and method for efficiently implementing a processor pipelineINTEL CORP·Filed 2014·Granted Sep 10, 2019·6 cites·8 claims
- 0374US9612840B2Method and apparatus for implementing a dynamic out-of-order processor pipelineINTEL CORP·Filed 2014·Granted Apr 4, 2017·3 cites·26 claims
- 0470US10338927B2Method and apparatus for implementing a dynamic out-of-order processor pipelineINTEL CORP·Filed 2017·Granted Jul 2, 2019·1 cites·27 claims
- 0566US9817642B2Apparatus and method for efficient call/return emulation using a dual return stack bufferINTEL CORP·Filed 2015·Granted Nov 14, 2017·1 cites·20 claims
- 0666US9811341B2Managed instruction cache prefetchingSTAVROU KYRIAKOS A·Filed 2011·Granted Nov 7, 2017·4 cites·5 claims
- 0764US9823938B2Providing deterministic, reproducible, and random sampling in a processorINTEL CORP·Filed 2015·Granted Nov 21, 2017·1 cites·17 claims
- 0862US12511127B2Dynamic reconfiguration of a multi-core processor to a unified coreNVIDIA CORP·Filed 2024·Granted Dec 30, 2025·0 cites·21 claims
- 0959US10013326B2Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code regionMARTINEZ RAUL·Filed 2011·Granted Jul 3, 2018·1 cites·18 claims
- 1056US12248785B2Instruction length decodingINTEL CORP·Filed 2020·Granted Mar 11, 2025·0 cites·14 claims
- 1156US10545735B2Apparatus and method for efficient call/return emulation using a dual return stack bufferINTEL CORP·Filed 2017·Granted Jan 28, 2020·0 cites·22 claims
- 1252US2019004916A1Profiling asynchronous events resulting from the execution of software at code region granularityINTEL CORP·Filed 2018·Application pending·0 cites
- 1351US10061587B2Instruction and logic for bulk register reclamationINTEL CORP·Filed 2014·Granted Aug 28, 2018·0 cites·20 claims
- 1451US2025265224A1Dynamic reconfiguration of a unified core processor to a multi-core processorNVIDIA CORP·Filed 2024·Application pending·0 cites
- 1550US10795681B2Instruction length decodingINTEL CORP·Filed 2014·Granted Oct 6, 2020·0 cites·20 claims
- 1647US2016179538A1Method and apparatus for implementing and maintaining a stack of predicate values with stack synchronization instructions in an out of order hardware software co-designed processorINTEL CORP·Filed 2014·Application pending·0 cites
- 1746US2016179542A1Instruction and logic to perform a fused single cycle increment-compare-jumpLAI PATRICK P·Filed 2014·Application pending·0 cites
- 1844US2016179549A1Instruction and Logic for Loop Stream DetectionINTEL CORP·Filed 2014·Application pending·0 cites
- 1943US10387159B2Apparatus and method for architectural performance monitoring in binary translation systemsINTEL CORP·Filed 2015·Granted Aug 20, 2019·0 cites·16 claims
- 2043US9710389B2Method and apparatus for memory aliasing detection in an out-of-order instruction execution platformINTEL CORP·Filed 2015·Granted Jul 18, 2017·0 cites·24 claims
- 2142US10157063B2Instruction and logic for optimization level aware branch predictionINTEL CORP·Filed 2012·Granted Dec 18, 2018·0 cites·6 claims
- 2242US2022129763A1High confidence multiple branch offset predictorINTEL CORP·Filed 2020·Application pending·0 cites
- 2342US2014143526A1Branch Prediction GatingXEKALAKIS POLYCHRONIS·Filed 2012·Application pending·0 cites
- 2441US2023315473A1Variable-length instruction steering to instruction decode clustersINTEL CORP·Filed 2022·Application pending·0 cites
- 2540US10635465B2Apparatuses and methods to prevent execution of a modified instructionINTEL CORP·Filed 2015·Granted Apr 28, 2020·0 cites·16 claims
- 2640US2012311308A1Branch Predictor with Jump Ahead Logic to Jump Over Portions of Program Code Lacking BranchesXEKALAKIS POLYCHRONIS·Filed 2011·Application pending·0 cites
- 2738US2013268735A1Support for speculative ownership without dataGIBERT CODINA ENRIC·Filed 2011·Application pending·0 cites
- 2837US2014156976A1Method, apparatus and system for selective execution of a commit instructionGIBERT CODINA ENRIC·Filed 2011·Application pending·0 cites
- 2932US2013326199A1Method and apparatus for controlling a mxcsrMAGKLIS GRIGORIOS·Filed 2011·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Polychronis Xekalakis files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →