Inventor · disambiguated record
Prasad Subbarao
Also filed as: SUBBARAO PRASAD
9 granted patents·2 pending applications·113 citations·filing 2001–2014
87Inventor score
Top patents by PatentIndex Score
11 records- 0184US6829754B1Method and system for checking for power errors in ASIC designsLSI LOGIC CORP·Filed 2002·Granted Dec 7, 2004·48 cites·60 claims
- 0275US6807656B1Decoupling capacitance estimation and insertion flow for ASIC designsLSI LOGIC CORP·Filed 2003·Granted Oct 19, 2004·28 cites·27 claims
- 0372US9158319B2Closed-loop adaptive voltage scaling for integrated circuitsLSI CORP·Filed 2013·Granted Oct 13, 2015·4 cites·20 claims
- 0466US6747349B1Termination ring for integrated circuitLSI LOGIC CORP·Filed 2002·Granted Jun 8, 2004·15 cites·26 claims
- 0560US7006962B1Distributed delay prediction of multi-million gate deep sub-micron ASIC designsLSI LOGIC CORP·Filed 2001·Granted Feb 28, 2006·10 cites·19 claims
- 0658US2014298277A1Methods for designing integrated circuits employing voltage scaling and integrated circuits designed therebyAGERE SYSTEMS LLC·Filed 2014·Application pending·0 cites
- 0753US8806408B2Methods for designing integrated circuits employing voltage scaling and integrated circuits designed therebyPARKER JAMES C·Filed 2009·Granted Aug 12, 2014·0 cites·20 claims
- 0853US6845348B1Driver waveform modeling with multiple effective capacitancesLSI LOGIC CORP·Filed 2001·Granted Jan 18, 2005·5 cites·12 claims
- 0948US2014028364A1Critical path monitor hardware architecture for closed loop adaptive voltage scaling and method of operation thereofVENKATRAMAN RAMNATH·Filed 2012·Application pending·0 cites
- 1047US6781228B2Donut power mesh scheme for flip chip packageLSI LOGIC CORP·Filed 2003·Granted Aug 24, 2004·3 cites·19 claims
- 1138US6835972B2Bowtie and T-shaped structures of L-shaped mesh implementationLSI LOGIC CORP·Filed 2003·Granted Dec 28, 2004·0 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →