Inventor · disambiguated record
Qwai H. Low
Also filed as: LOW QWAI · LOW QWAI H · LOW QWAI HOONG
49 granted patents·3 pending applications·1,103 citations·filing 1993–2024
98Inventor score
Top patents by PatentIndex Score
52 records- 0197US11929337B23D-interconnectINVENSAS LLC·Filed 2021·Granted Mar 12, 2024·3 cites·20 claims
- 0296US5814881AStacked integrated chip package and method of making sameLSI LOGIC CORP·Filed 1996·Granted Sep 29, 1998·229 cites·23 claims
- 0394US5973393AApparatus and method for stackable molded lead frame ball grid array packaging of integrated circuitsLSI LOGIC CORP·Filed 1996·Granted Oct 26, 1999·169 cites·4 claims
- 0494US5886398AMolded laminate package with integral mold gateLSI LOGIC CORP·Filed 1997·Granted Mar 23, 1999·184 cites·20 claims
- 0588US10181447B23D-interconnectINVENSAS CORP·Filed 2017·Granted Jan 15, 2019·4 cites·14 claims
- 0687US11031362B23D-interconnectINVENSAS CORP·Filed 2019·Granted Jun 8, 2021·3 cites·20 claims
- 0786US5923047ASemiconductor die having sacrificial bond pads for die testLSI LOGIC CORP·Filed 1997·Granted Jul 13, 1999·78 cites·3 claims
- 0885US12476212B23D-interconnectADEIA SEMICONDUCTOR TECH LLC·Filed 2024·Granted Nov 18, 2025·0 cites·12 claims
- 0985US9508687B2Low cost hybrid high density packageTESSERA INC·Filed 2015·Granted Nov 29, 2016·4 cites·16 claims
- 1081US7420809B2Heat spreader in integrated circuit packageLSI CORP·Filed 2004·Granted Sep 2, 2008·33 cites·15 claims
- 1181US6329278B1Multiple row wire bonding with ball bonds of outer bond pads bonded on the leadsLSI LOGIC CORP·Filed 2000·Granted Dec 11, 2001·40 cites·10 claims
- 1280US5841191ABall grid array package employing raised metal contact ringsLSI LOGIC CORP·Filed 1997·Granted Nov 24, 1998·58 cites·12 claims
- 1378US8963310B2Low cost hybrid high density packageDESAI Kishor·Filed 2011·Granted Feb 24, 2015·5 cites·16 claims
- 1477US6114189AMolded array integrated circuit packageLSI LOGIC CORP·Filed 1997·Granted Sep 5, 2000·51 cites·18 claims
- 1573US6798035B1Bonding pad for low k dielectricLSI LOGIC CORP·Filed 2003·Granted Sep 28, 2004·20 cites·20 claims
- 1672US5353193AHigh power dissipating packages with matched heatspreader heatsink assembliesLSI LOGIC CORP·Filed 1993·Granted Oct 4, 1994·35 cites·18 claims
- 1770US7531442B2Eliminate IMC cracking in post wirebonded dies: macro level stress reduction by modifying dielectric/metal film stack in be layers during Cu/Low-K processingLSI CORP·Filed 2005·Granted May 12, 2009·5 cites·4 claims
- 1870US6825563B1Slotted bonding padLSI LOGIC CORP·Filed 2003·Granted Nov 30, 2004·17 cites·20 claims
- 1970US6743979B1Bonding pad isolationLSI LOGIC CORP·Filed 2003·Granted Jun 1, 2004·16 cites·20 claims
- 2067US8384205B2Electronic device package and method of manufactureLSI CORP·Filed 2011·Granted Feb 26, 2013·2 cites·20 claims
- 2167US8350379B2Package with power and ground through viaLSI CORP·Filed 2008·Granted Jan 8, 2013·4 cites·10 claims
- 2267US6963138B2Dielectric stackLSI LOGIC CORP·Filed 2003·Granted Nov 8, 2005·15 cites·20 claims
- 2364US6573113B1Integrated circuit having dedicated probe pads for use in testing densely patterned bonding padsLSI LOGIC CORP·Filed 2001·Granted Jun 3, 2003·13 cites·11 claims
- 2463US8134232B2Heat dissipation for integrated circuitLOHR MITCHEL E·Filed 2008·Granted Mar 13, 2012·5 cites·20 claims
- 2562US5463529AHigh power dissipating packages with matched heatspreader heatsink assembliesLSI LOGIC CORP·Filed 1994·Granted Oct 31, 1995·24 cites·28 claims
- 2658US7993981B2Electronic device package and method of manufactureLSI CORP·Filed 2009·Granted Aug 9, 2011·1 cites·10 claims
- 2757US6429534B1Interposer tape for semiconductor packageLSI LOGIC CORP·Filed 2000·Granted Aug 6, 2002·7 cites·20 claims
- 2855US9875955B2Low cost hybrid high density packageTESSERA INC·Filed 2016·Granted Jan 23, 2018·0 cites·15 claims
- 2955US8125091B2Wire bonding over active circuitsLOW QWAI H·Filed 2008·Granted Feb 28, 2012·1 cites·20 claims
- 3053US7235889B2Integrated heatspreader for use in wire bonded ball grid array semiconductor packagesLSI CORP·Filed 2004·Granted Jun 26, 2007·6 cites·11 claims
- 3150US6781150B2Test structure for detecting bonding-induced cracksLSI LOGIC CORP·Filed 2002·Granted Aug 24, 2004·4 cites·10 claims
- 3249US6489571B1Molded tape ball grid array packageLSI LOGIC CORP·Filed 2000·Granted Dec 3, 2002·3 cites·8 claims
- 3347US8334467B2Lead frame design to improve reliabilityGOLICK LARRY W·Filed 2009·Granted Dec 18, 2012·1 cites·14 claims
- 3446US8869389B2Method of manufacturing an electronic device packageLSI CORP·Filed 2012·Granted Oct 28, 2014·0 cites·20 claims
- 3546US6998638B2Test structure for detecting bonding-induced cracksLSI LOGIC CORP·Filed 2004·Granted Feb 14, 2006·2 cites·10 claims
- 3646US6057594AHigh power dissipating tape ball grid array packageLSI LOGIC CORP·Filed 1997·Granted May 2, 2000·13 cites·15 claims
- 3745US6040632AMultiple sized dieLSI LOGIC CORP·Filed 1998·Granted Mar 21, 2000·11 cites·6 claims
- 3842US6861748B2Test structureLSI LOGIC CORP·Filed 2002·Granted Mar 1, 2005·2 cites·10 claims
- 3942US6486002B1Tape design to reduce warpageLSI LOGIC CORP·Filed 2001·Granted Nov 26, 2002·1 cites·5 claims
- 4042US5568683AMethod of cooling a packaged electronic deviceLSI LOGIC CORP·Filed 1995·Granted Oct 29, 1996·8 cites·28 claims
- 4142US5386144ASnap on heat sink attachmentLSI LOGIC CORP·Filed 1993·Granted Jan 31, 1995·14 cites·10 claims
- 4239US6861343B2Buffer metal layerFiled 2002·Granted Mar 1, 2005·0 cites·20 claims
- 4337US2004178498A1Wire bonding to full array bonding pads on active circuitryFiled 2003·Application pending·0 cites
- 4436US8525312B2Area array quad flat no-lead (QFN) packageLOW QWAI H·Filed 2011·Granted Sep 3, 2013·0 cites·26 claims
- 4535US6143586AElectrostatic protected substrateLSI LOGIC CORP·Filed 1998·Granted Nov 7, 2000·5 cites·13 claims
- 4635US2012018901A1Flip-chip package and method of manufacturing the same using ablationVARIOT PATRICK·Filed 2010·Application pending·0 cites
- 4734US8525309B2Flip-chip QFN structure using etched lead frameCHIA CHOK·Filed 2011·Granted Sep 3, 2013·0 cites·53 claims
- 4833US6285077B1Multiple layer tape ball grid array packageLSI LOGIC CORP·Filed 1999·Granted Sep 4, 2001·3 cites·12 claims
- 4933US5973397ASemiconductor device and fabrication method which advantageously combine wire bonding and tab techniques to increase integrated circuit I/O pad densityLSI LOGIC CORP·Filed 1997·Granted Oct 26, 1999·3 cites·24 claims
- 5031US6603200B1Integrated circuit packageLSI LOGIC CORP·Filed 1997·Granted Aug 5, 2003·1 cites·6 claims
Showing the top 50 of 52 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →