Inventor · disambiguated record
Raj Kumar Gajavelly
Also filed as: GAJAVELLY RAJ K · Gajavelly Raj Kumar
17 granted patents·2 pending applications·15 citations·filing 2015–2024
88Inventor score
Files withIBM19
Top patents by PatentIndex Score
19 records- 0183US10210296B2Adaptive bug-search depth for simple and deep counterexamplesIBM·Filed 2017·Granted Feb 19, 2019·3 cites·6 claims
- 0282US10621297B1Initial-state and next-state value foldingIBM·Filed 2018·Granted Apr 14, 2020·4 cites·20 claims
- 0381US10579770B2Scalable connectivity verification using conditional cut-pointsIBM·Filed 2018·Granted Mar 3, 2020·3 cites·20 claims
- 0478US10073938B2Integrated circuit design verificationIBM·Filed 2016·Granted Sep 11, 2018·3 cites·19 claims
- 0571US10394987B2Adaptive bug-search depth for simple and deep counterexamplesIBM·Filed 2017·Granted Aug 27, 2019·1 cites·11 claims
- 0666US9471734B2System and program product for scalable liveness verification via abstraction refinementIBM·Filed 2015·Granted Oct 18, 2016·1 cites·14 claims
- 0765US12422476B2Co-debug of processing conditions of logic devicesIBM·Filed 2024·Granted Sep 23, 2025·0 cites·20 claims
- 0860US10970454B2Scalable connectivity verification using conditional cut-pointsIBM·Filed 2020·Granted Apr 6, 2021·0 cites·20 claims
- 0951US9483595B2Method for scalable liveness verification via abstraction refinementIBM·Filed 2015·Granted Nov 1, 2016·0 cites·7 claims
- 1050US9678853B2Lifting of bounded liveness counterexamples to concrete liveness counterexamplesIBM·Filed 2015·Granted Jun 13, 2017·0 cites·9 claims
- 1149US9740589B2Lifting of bounded liveness counterexamples to concrete liveness counterexamplesIBM·Filed 2015·Granted Aug 22, 2017·0 cites·11 claims
- 1249US2024386173A1Scalable, optimal retiming of multi-clocked netlistsIBM·Filed 2023·Application pending·0 cites
- 1349US2024386172A1Scalable, optimal retiming of multi-clocked netlistsIBM·Filed 2023·Application pending·0 cites
- 1447US10540468B1Verification complexity reduction via range-preserving input-to-constant conversionIBM·Filed 2018·Granted Jan 21, 2020·0 cites·20 claims
- 1547US10078716B2Scalable logic verification by identifying unate primary inputsIBM·Filed 2016·Granted Sep 18, 2018·0 cites·20 claims
- 1645US10474777B2Scalable liveness verificationIBM·Filed 2017·Granted Nov 12, 2019·0 cites·17 claims
- 1745US9922153B2Scalable logic verification by identifying unate primary inputsIBM·Filed 2016·Granted Mar 20, 2018·0 cites·17 claims
- 1842US9715564B2Scalable and automated identification of unobservability causality in logic optimization flowsIBM·Filed 2015·Granted Jul 25, 2017·0 cites·20 claims
- 1936US9934873B2Delayed equivalence identificationIBM·Filed 2017·Granted Apr 3, 2018·0 cites·1 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →