Inventor · disambiguated record
Rahul Mathur
Also filed as: MATHUR RAHUL
23 granted patents·4 pending applications·31 citations·filing 2016–2024
92Inventor score
Files withADVANCED RISC MACH LTD27
Top patents by PatentIndex Score
27 records- 0191US11211111B1CAM device with 3D CAM cellsADVANCED RISC MACH LTD·Filed 2020·Granted Dec 28, 2021·3 cites·20 claims
- 0286US9620200B1Retention voltages for integrated circuitsADVANCED RISC MACH LTD·Filed 2016·Granted Apr 11, 2017·6 cites·20 claims
- 0385US11475944B2Read assist circuitry for memory applicationsADVANCED RISC MACH LTD·Filed 2020·Granted Oct 18, 2022·2 cites·19 claims
- 0481US10497414B1Circuitry for tracking bias voltage behaviorADVANCED RISC MACH LTD·Filed 2018·Granted Dec 3, 2019·6 cites·16 claims
- 0580US11569219B2TSV coupled integrated circuits and methodsADVANCED RISC MACH LTD·Filed 2020·Granted Jan 31, 2023·1 cites·14 claims
- 0675US10008260B1Clock generation circuitry for memory applicationsADVANCED RISC MACH LTD·Filed 2017·Granted Jun 26, 2018·4 cites·20 claims
- 0775US9997217B1Write assist circuitryADVANCED RISC MACH LTD·Filed 2017·Granted Jun 12, 2018·4 cites·20 claims
- 0874US12456514B2Buried metal techniquesADVANCED RISC MACH LTD·Filed 2022·Granted Oct 28, 2025·0 cites·14 claims
- 0974US10854280B2Read assist circuitry for memory applicationsADVANCED RISC MACH LTD·Filed 2017·Granted Dec 1, 2020·4 cites·19 claims
- 1069US12422992B2Increased throughput for writes to memoryADVANCED RISC MACH LTD·Filed 2024·Granted Sep 23, 2025·0 cites·20 claims
- 1167US2023178538A1TSV Coupled Integrated Circuits and MethodsADVANCED RISC MACH LTD·Filed 2023·Application pending·0 cites
- 1263US12450094B2Methods and apparatus for workload schedulingADVANCED RISC MACH LTD·Filed 2022·Granted Oct 21, 2025·0 cites·17 claims
- 1360US12223010B2Methods and circuits of spatial alignmentADVANCED RISC MACH LTD·Filed 2021·Granted Feb 11, 2025·0 cites·19 claims
- 1459US10839934B2Redundancy circuitry for memory applicationADVANCED RISC MACH LTD·Filed 2018·Granted Nov 17, 2020·1 cites·21 claims
- 1558US11682432B2Multi-tier memory architectureADVANCED RISC MACH LTD·Filed 2021·Granted Jun 20, 2023·0 cites·20 claims
- 1657US12068025B2Power-up header circuitry for multi-bank memoryADVANCED RISC MACH LTD·Filed 2022·Granted Aug 20, 2024·0 cites·19 claims
- 1756US11532353B2Circuitry apportioning of an integrated circuitADVANCED RISC MACH LTD·Filed 2021·Granted Dec 20, 2022·0 cites·16 claims
- 1856US2025087251A1Power-Gate StructureADVANCED RISC MACH LTD·Filed 2023·Application pending·0 cites
- 1954US12494237B2Clock circuitry for memory applicationsADVANCED RISC MACH LTD·Filed 2023·Granted Dec 9, 2025·0 cites·20 claims
- 2053US11670363B2Multi-tier memory architectureADVANCED RISC MACH LTD·Filed 2021·Granted Jun 6, 2023·0 cites·20 claims
- 2151US12412623B2Precharge circuitry for use with bitlinesADVANCED RISC MACH LTD·Filed 2022·Granted Sep 9, 2025·0 cites·20 claims
- 2250US2025259671A1Increased throughput for reads in static random access memoryADVANCED RISC MACH LTD·Filed 2024·Application pending·0 cites
- 2349US12087353B2Burst read with flexible burst length for on-chip memoryADVANCED RISC MACH LTD·Filed 2022·Granted Sep 10, 2024·0 cites·18 claims
- 2448US2025078912A1Multi-Transistor Bitcell StructureADVANCED RISC MACH LTD·Filed 2023·Application pending·0 cites
- 2545US11468945B23D storage architecture with tier-specific controlsADVANCED RISC MACH LTD·Filed 2020·Granted Oct 11, 2022·0 cites·19 claims
- 2637US10896707B2Selective clock adjustment during read and/or write memory operationsADVANCED RISC MACH LTD·Filed 2019·Granted Jan 19, 2021·0 cites·18 claims
- 2733US10535386B2Level shifter with bypassADVANCED RISC MACH LTD·Filed 2017·Granted Jan 14, 2020·0 cites·18 claims
Join the waitlist — get patent alerts
Get an alert when Rahul Mathur files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →