Inventor · disambiguated record
Remy Berthelon
Also filed as: BERTHELON REMY
13 granted patents·6 pending applications·3 citations·filing 2016–2025
83Inventor score
Files withST MICROELECTRONICS CROLLES 2 SAS11COMMISSARIAT ENERGIE ATOMIQUE4ST MICROELECTRONICS INT NV4
Top patents by PatentIndex Score
19 records- 0190US11411177B2Phase-change memory with insulated wallsST MICROELECTRONICS CROLLES 2 SAS·Filed 2020·Granted Aug 9, 2022·2 cites·10 claims
- 0274US12144187B2Strained transistors and phase change memoryST MICROELECTRONICS CROLLES 2 SAS·Filed 2023·Granted Nov 12, 2024·0 cites·19 claims
- 0373US12167703B2Electronic chip with two phase change memoriesST MICROELECTRONICS CROLLES 2 SAS·Filed 2023·Granted Dec 10, 2024·0 cites·17 claims
- 0472US11800821B2Phase-change memory with an insulating layer on a cavity sidewallST MICROELECTRONICS CROLLES 2 SAS·Filed 2022·Granted Oct 24, 2023·0 cites·20 claims
- 0565US11723220B2Strained transistors and phase change memoryST MICROELECTRONICS CROLLES 2 SAS·Filed 2021·Granted Aug 8, 2023·0 cites·20 claims
- 0665US10263110B2Method of forming strained MOS transistorsST MICROELECTRONICS CROLLES 2 SAS·Filed 2016·Granted Apr 16, 2019·1 cites·10 claims
- 0765US2025374836A1Electronic device comprising a memory circuit based on phase-change materialST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 0864US11690303B2Electronic chip with two phase change memoriesST MICROELECTRONICS CROLLES 2 SAS·Filed 2021·Granted Jun 27, 2023·0 cites·21 claims
- 0963US2025226010A1Electronic deviceST MICROELECTRONICS INT NV·Filed 2024·Application pending·0 cites
- 1058US2024306401A1Method of manufacturing an electronic chip comprising a memory circuitST MICROELECTRONICS INT NV·Filed 2024·Application pending·0 cites
- 1156US2023411450A1Electronic device manufacturing methodST MICROELECTRONICS CROLLES 2 SAS·Filed 2023·Application pending·0 cites
- 1255US10777680B2Integrated circuit chip with strained NMOS and PMOS transistorsST MICROELECTRONICS CROLLES 2 SAS·Filed 2019·Granted Sep 15, 2020·0 cites·17 claims
- 1355US2024147737A1Method of fabricating an electronic chip including a memory circuitST MICROELECTRONICS CROLLES 2 SAS·Filed 2023·Application pending·0 cites
- 1451US10418486B2Integrated circuit chip with strained NMOS and PMOS transistorsST MICROELECTRONICS CROLLES 2 SAS·Filed 2018·Granted Sep 17, 2019·0 cites·24 claims
- 1548US2025254992A1Electronic chip comprising stressed transistorsST MICROELECTRONICS INT NV·Filed 2025·Application pending·0 cites
- 1646US10741565B23D SRAM circuit with double gate transistors with improved layoutCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2019·Granted Aug 11, 2020·0 cites·18 claims
- 1741US10446548B2Integrated circuit including balanced cells limiting an active areaCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Oct 15, 2019·0 cites·10 claims
- 1840US10546929B2Optimized double-gate transistors and fabricating processCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2018·Granted Jan 28, 2020·0 cites·19 claims
- 1940US10504897B2Integrated circuit comprising balanced cells at the activeCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Dec 10, 2019·0 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →