Inventor · disambiguated record
Ren-Jie Chang
Also filed as: CHANG REN-JIE
8 granted patents·11 pending applications·5 citations·filing 2020–2025
76Inventor score
Files withASM IP HOLDING BV19
Top patents by PatentIndex Score
19 records- 0190US12159788B2Method of forming structures for threshold voltage controlASM IP HOLDING BV·Filed 2021·Granted Dec 3, 2024·2 cites·18 claims
- 0288US12406881B2Methods and systems for filling a gapASM IP HOLDING BV·Filed 2022·Granted Sep 2, 2025·1 cites·17 claims
- 0388US11898243B2Method of forming vanadium nitride-containing layerASM IP HOLDING BV·Filed 2020·Granted Feb 13, 2024·2 cites·14 claims
- 0480US2025357199A1Methods and systems for filling a gapASM IP HOLDING BV·Filed 2025·Application pending·0 cites
- 0577US12448683B2Method of forming a vanadium nitride-containing layerASM IP HOLDING BV·Filed 2024·Granted Oct 21, 2025·0 cites·20 claims
- 0670US2025062128A1Method of forming structures for threshold voltage controlASM IP HOLDING BV·Filed 2024·Application pending·0 cites
- 0767US12463094B2Multiple-layer method and system for forming material within a gapASM IP HOLDING BV·Filed 2022·Granted Nov 4, 2025·0 cites·20 claims
- 0866US2025327179A1Systems, methods, and structures for threshold voltage controlASM IP HOLDING BV·Filed 2025·Application pending·0 cites
- 0963US2025218783A1Method, system and apparatus for forming a threshold voltage shifting layerASM IP HOLDING BV·Filed 2024·Application pending·0 cites
- 1062US12435417B2Methods and systems for forming a layer comprising vanadium and oxygenASM IP HOLDING BV·Filed 2022·Granted Oct 7, 2025·0 cites·17 claims
- 1162US2025183030A1Metal and phosphorous containing films and methods and systems for producing said films and applications thereofASM IP HOLDING BV·Filed 2024·Application pending·0 cites
- 1256US12031206B2Methods and systems for forming a layer comprising a transitional metal and a group 13 elementASM IP HOLDING BV·Filed 2022·Granted Jul 9, 2024·0 cites·10 claims
- 1356US2025369110A1Method for forming a semiconductor structure, method for depositing a dipole layer on a substrate, and associated methods for forming a gate structure for a semiconductor deviceASM IP HOLDING BV·Filed 2025·Application pending·0 cites
- 1455US2025079169A1Methods for forming semiconductor structures including two-dimensional metal dichalcogenide layersASM IP HOLDING BV·Filed 2024·Application pending·0 cites
- 1553US2023095086A1Methods and systems for filling a gapASM IP HOLDING BV·Filed 2022·Application pending·0 cites
- 1652US12009224B2Apparatus and method for etching metal nitridesASM IP HOLDING BV·Filed 2021·Granted Jun 11, 2024·0 cites·10 claims
- 1752US2023386934A1Methods and systems for forming dipole layers in stacked gate-all-around transistorsASM IP HOLDING BV·Filed 2023·Application pending·0 cites
- 1851US2022293463A1Methods and systems for filling a gapASM IP HOLDING BV·Filed 2022·Application pending·0 cites
- 1946US2022165575A1Method of forming structures for threshold voltage controlASM IP HOLDING BV·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →