Inventor · disambiguated record
Rikizo Nakano
Also filed as: NAKANO RIKIZO
10 granted patents·2 pending applications·61 citations·filing 1994–2012
87Inventor score
Top patents by PatentIndex Score
12 records- 0191US8972822B2Memory module and semiconductor storage deviceFUJITSU LTD·Filed 2012·Granted Mar 3, 2015·16 cites·6 claims
- 0281US8738976B2Memory error detecting apparatus and methodNAKANO RIKIZO·Filed 2011·Granted May 27, 2014·9 cites·6 claims
- 0378US8423842B2Test apparatus and test method for testing a memory deviceNAKANO RIKIZO·Filed 2010·Granted Apr 16, 2013·8 cites·15 claims
- 0473US8473675B2Memory system and information processing deviceMIYAZAKI SADAO·Filed 2010·Granted Jun 25, 2013·4 cites·15 claims
- 0555US5481551AIC element testing deviceFUJITSU LTD·Filed 1994·Granted Jan 2, 1996·17 cites·12 claims
- 0650US8495463B2Memory controlling apparatus and methodMIYAZAKI SADAO·Filed 2010·Granted Jul 23, 2013·1 cites·18 claims
- 0750US8135971B2Data processing apparatusMIYAZAKI SADAO·Filed 2009·Granted Mar 13, 2012·0 cites·6 claims
- 0850US7990172B2Method and apparatus for testing electronic deviceFUJITSU LTD·Filed 2009·Granted Aug 2, 2011·2 cites·16 claims
- 0937US8868990B2Semiconductor memory device and information processing apparatus including the sameNAKANO RIKIZO·Filed 2012·Granted Oct 21, 2014·0 cites·12 claims
- 1034US2006208772A1Semiconductor integrated circuit and noise-reduction method thereofFUJITSU LTD·Filed 2005·Application pending·0 cites
- 1134US2007201282A1Memory moduleFUJITSU LTD·Filed 2006·Application pending·0 cites
- 1233US5396466AMethod of testing bit lines of a memory unitFUJITSU LTD·Filed 1994·Granted Mar 7, 1995·4 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →