Inventor · disambiguated record
Robert Burtzlaff
Also filed as: BURTZLAFF ROBERT
2 granted patents·5 pending applications·128 citations·filing 2004–2007
70Inventor score
Top patents by PatentIndex Score
7 records- 0194US7936062B2Wafer level chip packagingTESSERA TECH IRELAND LTD·Filed 2007·Granted May 3, 2011·75 cites·23 claims
- 0292US7224056B2Back-face and edge interconnects for lidded packageTESSERA INC·Filed 2004·Granted May 29, 2007·53 cites·24 claims
- 0351US2007096295A1Back-face and edge interconnects for lidded packageTESSERA INC·Filed 2006·Application pending·0 cites
- 0445US2007138644A1Structure and method of making capped chip having discrete article assembled into vertical interconnectTESSERA INC·Filed 2005·Application pending·0 cites
- 0543US2005189622A1Packaged acoustic and electromagnetic transducer chipsTESSERA INC·Filed 2005·Application pending·0 cites
- 0643US2005189635A1Packaged acoustic and electromagnetic transducer chipsTESSERA INC·Filed 2005·Application pending·0 cites
- 0740US2007190747A1Wafer level packaging to lidded chipsTESSERA TECH HUNGARY KFT·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →