Inventor · disambiguated record
Robert T. George
Also filed as: GEORGE ROBERT · GEORGE ROBERT T
24 granted patents·3 pending applications·560 citations·filing 2000–2019
96Inventor score
Technology areasG06F
Top patents by PatentIndex Score
27 records- 0196US6681292B2Distributed read and write caching implementation for optimized input/output applicationsINTEL CORP·Filed 2001·Granted Jan 20, 2004·294 cites·30 claims
- 0290US7562179B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2004·Granted Jul 14, 2009·30 cites·22 claims
- 0389US10740249B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2019·Granted Aug 11, 2020·2 cites·4 claims
- 0489US7024555B2Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environmentINTEL CORP·Filed 2001·Granted Apr 4, 2006·50 cites·38 claims
- 0588US10303620B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2018·Granted May 28, 2019·2 cites·1 claims
- 0688US7552255B1Dynamically partitioning pipeline resourcesINTEL CORP·Filed 2003·Granted Jun 23, 2009·59 cites·20 claims
- 0786US7552254B1Associating address space identifiers with active contextsINTEL CORP·Filed 2003·Granted Jun 23, 2009·46 cites·20 claims
- 0885US9507730B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2015·Granted Nov 29, 2016·2 cites·1 claims
- 0983US8788790B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2012·Granted Jul 22, 2014·3 cites·5 claims
- 1080US8046539B2Method and apparatus for the synchronization of distributed cachesINTEL CORP·Filed 2009·Granted Oct 25, 2011·9 cites·30 claims
- 1176US6772298B2Method and apparatus for invalidating a cache line without data return in a multi-node architectureINTEL CORP·Filed 2000·Granted Aug 3, 2004·24 cites·19 claims
- 1275US9164918B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2014·Granted Oct 20, 2015·1 cites·7 claims
- 1375US9152561B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2014·Granted Oct 6, 2015·1 cites·10 claims
- 1473US7904694B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2009·Granted Mar 8, 2011·2 cites·19 claims
- 1571US8543793B2Maintaining processor resources during architectural eventsBRANDT JASON W·Filed 2011·Granted Sep 24, 2013·1 cites·15 claims
- 1667US7546422B2Method and apparatus for the synchronization of distributed cachesINTEL CORP·Filed 2002·Granted Jun 9, 2009·12 cites·16 claims
- 1765US9996475B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2016·Granted Jun 12, 2018·0 cites·1 claims
- 1865US7089362B2Cache memory eviction policy for combining write transactionsINTEL CORP·Filed 2001·Granted Aug 8, 2006·11 cites·22 claims
- 1964US9164901B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2014·Granted Oct 20, 2015·0 cites·7 claims
- 2063US7921293B2Apparatus and method for unilaterally loading a secure operating system within a multiprocessor environmentINTEL CORP·Filed 2006·Granted Apr 5, 2011·2 cites·18 claims
- 2162US7162546B2Reordering unrelated transactions from an ordered interfaceINTEL CORP·Filed 2001·Granted Jan 9, 2007·9 cites·15 claims
- 2261US8806172B2Maintaining processor resources during architectural evensINTEL CORP·Filed 2013·Granted Aug 12, 2014·0 cites·8 claims
- 2359US7899972B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2009·Granted Mar 1, 2011·0 cites·18 claims
- 2457US9086958B2Maintaining processor resources during architectural eventsINTEL CORP·Filed 2013·Granted Jul 21, 2015·0 cites·1 claims
- 2545US2003229794A1System and method for protection against untrusted system management code by redirecting a system management interrupt and creating a virtual machine containerFiled 2002·Application pending·0 cites
- 2639US2003041215A1Method and apparatus for the utilization of distributed cachesFiled 2001·Application pending·0 cites
- 2738US2002087766A1Method and apparatus to implement a locked-bus transactionFiled 2000·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →