Inventor · disambiguated record
Robert Haig
Also filed as: HAIG ROBERT · HAIG ROBERT B
10 granted patents·348 citations·filing 1992–2015
92Inventor score
Top patents by PatentIndex Score
10 records- 0197US9679631B2Systems and methods involving multi-bank, dual- or multi-pipe SRAMsGSI TECHNOLOGY INC·Filed 2015·Granted Jun 13, 2017·26 cites·37 claims
- 0296US9196324B2Systems and methods involving multi-bank, dual- or multi-pipe SRAMsGSI TECHNOLOGY INC·Filed 2014·Granted Nov 24, 2015·24 cites·45 claims
- 0395US9613684B2Systems and methods involving propagating read and write address and data through multi-bank memory circuitryGSI TECHNOLOGY INC·Filed 2015·Granted Apr 4, 2017·26 cites·20 claims
- 0493US7595657B2Dynamic dual control on-die terminationSONY CORP·Filed 2008·Granted Sep 29, 2009·25 cites·26 claims
- 0592US7646215B2Efficient method for implementing programmable impedance output drivers and programmable input on die termination on a bi-directional data busSONY CORP·Filed 2008·Granted Jan 12, 2010·29 cites·19 claims
- 0692US5327531AData processing system including corrupt flash ROM recoveryIBM·Filed 1992·Granted Jul 5, 1994·155 cites·9 claims
- 0783US8982649B2Systems and methods involving multi-bank, dual- or multi-pipe SRAMsHAIG ROBERT·Filed 2011·Granted Mar 17, 2015·9 cites·25 claims
- 0881US10720205B2Systems and methods involving multi-bank, dual-pipe memory circuitryGSI TECHNOLOGY INC·Filed 2015·Granted Jul 21, 2020·6 cites·30 claims
- 0974US5379400AMethod and system for determining memory refresh rateIBM·Filed 1992·Granted Jan 3, 1995·37 cites·17 claims
- 1066US7093051B2Dynamic input/output: configurable data bus for optimizing data throughputSONY ELECTRONICS INC·Filed 2002·Granted Aug 15, 2006·11 cites·31 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →