Inventor · disambiguated record
Robert B. Lefferts
Also filed as: LEFFERTS ROBERT B · LEFFERTS ROBERT BEVERLY
15 granted patents·4 pending applications·171 citations·filing 1989–2022
92Inventor score
Files withSYNOPSYS INC9FLYNN JAMES P2LATTICE SEMICONDUCTOR CORP2SEARLES SHAWN2BIPOLAR INTEGRATED TECHNOLOGY1
Top patents by PatentIndex Score
19 records- 0189US9728528B2Method and apparatus for floating or applying voltage to a well of an integrated circuitSYNOPSYS INC·Filed 2014·Granted Aug 8, 2017·5 cites·22 claims
- 0288US5670907AVBB reference for pumped substratesLATTICE SEMICONDUCTOR CORP·Filed 1995·Granted Sep 23, 1997·93 cites·19 claims
- 0384US10339249B2Using color pattern assigned to shapes for custom layout of integrated circuit (IC) designsSYNOPSYS INC·Filed 2016·Granted Jul 2, 2019·4 cites·15 claims
- 0483US7262621B1Method and apparatus for integrated mixed-signal or analog testingSYNOPSYS INC·Filed 2005·Granted Aug 28, 2007·12 cites·12 claims
- 0582US6370071B1High voltage CMOS switchLATTICE SEMICONDUCTOR CORP·Filed 2000·Granted Apr 9, 2002·33 cites·21 claims
- 0678US8958186B2Mitigating cross-domain transmission of electrostatic discharge (ESD) eventsSYNOPSYS INC·Filed 2012·Granted Feb 17, 2015·5 cites·11 claims
- 0773US8208591B2Method and apparatus for performing adaptive equalizationFLYNN JAMES P·Filed 2010·Granted Jun 26, 2012·4 cites·21 claims
- 0870US9287253B2Method and apparatus for floating or applying voltage to a well of an integrated circuitMOROZ VICTOR·Filed 2011·Granted Mar 15, 2016·2 cites·20 claims
- 0967US11334705B2Electrical circuit design using cells with metal linesSYNOPSYS INC·Filed 2020·Granted May 17, 2022·1 cites·19 claims
- 1058US10741538B2Method and apparatus for floating or applying voltage to a well of an integrated circuitSYNOPSYS INC·Filed 2017·Granted Aug 11, 2020·0 cites·21 claims
- 1154US2023023073A1Input/output devices that are compatible with gate-all-around technologySYNOPSYS INC·Filed 2022·Application pending·0 cites
- 1253US7345992B2System and method for embedding a sub-channel in a block coded data streamSYNOPSYS INC·Filed 2003·Granted Mar 18, 2008·2 cites·15 claims
- 1353US7158575B2System and method for embedding a sub-channel in a block coded data streamSYNOPSYS INC·Filed 2002·Granted Jan 2, 2007·2 cites·18 claims
- 1449US8976497B2Preventing electrostatic discharge (ESD) failures across voltage domainsLEFFERTS ROBERT B·Filed 2012·Granted Mar 10, 2015·1 cites·25 claims
- 1546US2004120406A1System and method for characterizing the performance of data communication systems and devicesFiled 2002·Application pending·0 cites
- 1645US2004120407A1System and method for characterizing the performance of data communication systems and devicesSEARLES SHAWN·Filed 2003·Application pending·0 cites
- 1745US2004120392A1System and method for characterizing the performance of data communication systems and devicesSEARLES SHAWN·Filed 2003·Application pending·0 cites
- 1842US8184757B2Pattern agnostic on-die scopeFLYNN JAMES P·Filed 2010·Granted May 22, 2012·0 cites·23 claims
- 1941US5043939ASoft error immune memoryBIPOLAR INTEGRATED TECHNOLOGY·Filed 1989·Granted Aug 27, 1991·7 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →