Inventor · disambiguated record
Ruilong Xie
Also filed as: XIE RUILONG
1,189 granted patents·685 pending applications·8,272 citations·filing 2011–2024
99Inventor score
Files withIBM1,336GLOBALFOUNDRIES INC445ST MICROELECTRONICS INC34GLOBALFOUNDRIES US INC29XIE RUILONG15
Top patents by PatentIndex Score
1,874 records- 0199US11665877B1Stacked FET SRAM designIBM·Filed 2021·Granted May 30, 2023·5 cites·18 claims
- 0299US11315938B1Stacked nanosheet romIBM·Filed 2020·Granted Apr 26, 2022·13 cites·20 claims
- 0399US11251362B2Stacked spin-orbit-torque magnetoresistive random-access memoryIBM·Filed 2020·Granted Feb 15, 2022·9 cites·18 claims
- 0499US11201153B2Stacked field effect transistor with wrap-around contactsIBM·Filed 2020·Granted Dec 14, 2021·9 cites·15 claims
- 0599US11164792B2Complementary field-effect transistorsIBM·Filed 2020·Granted Nov 2, 2021·8 cites·20 claims
- 0699US11069684B1Stacked field effect transistors with reduced coupling effectIBM·Filed 2020·Granted Jul 20, 2021·49 cites·20 claims
- 0799US10665669B1Insulative structure with diffusion break integral with isolation layer and methods to form sameGLOBALFOUNDRIES INC·Filed 2019·Granted May 26, 2020·39 cites·20 claims
- 0899US10510620B1Work function metal patterning for N-P space between active nanostructuresGLOBALFOUNDRIES INC·Filed 2018·Granted Dec 17, 2019·126 cites·6 claims
- 0999US10388732B1Nanosheet field-effect transistors including a two-dimensional semiconducting materialGLOBALFOUNDRIES INC·Filed 2018·Granted Aug 20, 2019·88 cites·20 claims
- 1099US10332803B1Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of formingGLOBALFOUNDRIES INC·Filed 2018·Granted Jun 25, 2019·83 cites·20 claims
- 1199US10332963B1Uniformity tuning of variable-height features formed in trenchesGLOBALFOUNDRIES INC·Filed 2018·Granted Jun 25, 2019·346 cites·19 claims
- 1299US10256158B1Insulated epitaxial structures in nanosheet complementary field effect transistorsGLOBALFOUNDRIES INC·Filed 2017·Granted Apr 9, 2019·68 cites·20 claims
- 1399US10192819B1Integrated circuit structure incorporating stacked field effect transistorsGLOBALFOUNDRIES INC·Filed 2017·Granted Jan 29, 2019·76 cites·20 claims
- 1499US10170484B1Integrated circuit structure incorporating multiple gate-all-around field effect transistors having different drive currents and methodGLOBALFOUNDRIES INC·Filed 2017·Granted Jan 1, 2019·61 cites·20 claims
- 1599US10090193B1Integrated circuit structure incorporating a stacked pair of field effect transistors and a buried interconnect and methodGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 2, 2018·68 cites·20 claims
- 1699US10026824B1Air-gap gate sidewall spacer and methodGLOBALFOUNDRIES INC·Filed 2017·Granted Jul 17, 2018·53 cites·17 claims
- 1799US10014390B1Inner spacer formation for nanosheet field-effect transistors with tall suspensionsGLOBALFOUNDRIES INC·Filed 2017·Granted Jul 3, 2018·74 cites·16 claims
- 1899US9991352B1Methods of forming a nano-sheet transistor device with a thicker gate stack and the resulting deviceGLOBALFOUNDRIES INC·Filed 2017·Granted Jun 5, 2018·90 cites·20 claims
- 1999US9947804B1Methods of forming nanosheet transistor with dielectric isolation of source-drain regions and related structureGLOBALFOUNDRIES INC·Filed 2017·Granted Apr 17, 2018·154 cites·14 claims
- 2099US9923055B1Inner spacer for nanosheet transistorsIBM·Filed 2016·Granted Mar 20, 2018·49 cites·19 claims
- 2199US9847390B1Self-aligned wrap-around contacts for nanosheet devicesGLOBALFOUNDRIES INC·Filed 2017·Granted Dec 19, 2017·74 cites·20 claims
- 2299US9780208B1Method and structure of forming self-aligned RMG gate for VFETGLOBALFOUNDRIES INC·Filed 2016·Granted Oct 3, 2017·60 cites·19 claims
- 2399US9741716B1Forming vertical and horizontal field effect transistors on the same substrateIBM·Filed 2016·Granted Aug 22, 2017·43 cites·17 claims
- 2499US9716170B1Reduced capacitance in vertical transistors by preventing excessive overlap between the gate and the source/drainIBM·Filed 2016·Granted Jul 25, 2017·46 cites·11 claims
- 2599US9711618B1Fabrication of vertical field effect transistor structure with controlled gate lengthIBM·Filed 2016·Granted Jul 18, 2017·43 cites·13 claims
- 2699US9536982B1Etch stop for airgap protectionIBM·Filed 2015·Granted Jan 3, 2017·60 cites·18 claims
- 2799US9508604B1Methods of forming punch through stop regions on FinFET devices on CMOS-based IC products using doped spacersGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 29, 2016·51 cites·25 claims
- 2899US9466570B1MOSFET with asymmetric self-aligned contactIBM·Filed 2016·Granted Oct 11, 2016·36 cites·14 claims
- 2999US9455331B1Method and structure of forming controllable unmerged epitaxial materialIBM·Filed 2015·Granted Sep 27, 2016·66 cites·14 claims
- 3099US9412616B1Methods of forming single and double diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting productsGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 9, 2016·148 cites·22 claims
- 3199US9397003B1Method for forming source/drain contacts during CMOS integration using confined epitaxial growth techniquesGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 19, 2016·79 cites·20 claims
- 3299US9362181B1Methods of forming diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting productsGLOBALFOUNDRIES INC·Filed 2015·Granted Jun 7, 2016·69 cites·31 claims
- 3399US9245885B1Methods of forming lateral and vertical FinFET devices and the resulting productGLOBALFOUNDRIES INC·Filed 2015·Granted Jan 26, 2016·60 cites·17 claims
- 3499US9111907B2Silicide protection during contact metallization and resulting semiconductor structuresGLOBALFOUNDRIES INC·Filed 2014·Granted Aug 18, 2015·174 cites·14 claims
- 3599US8703557B1Methods of removing dummy fin structures when forming finFET devicesGLOBALFOUNDRIES INC·Filed 2013·Granted Apr 22, 2014·63 cites·23 claims
- 3699US8524592B1Methods of forming semiconductor devices with self-aligned contacts and low-k spacers and the resulting devicesXIE RUILONG·Filed 2012·Granted Sep 3, 2013·70 cites·18 claims
- 3798US11984401B2Stacked FET integration with BSPDNIBM·Filed 2021·Granted May 14, 2024·5 cites·8 claims
- 3898US11757036B2Moon-shaped bottom spacer for vertical transport field effect transistor (VTFET) devicesIBM·Filed 2021·Granted Sep 12, 2023·4 cites·14 claims
- 3998US11637179B2Airgap vertical transistor without structural collapseIBM·Filed 2020·Granted Apr 25, 2023·4 cites·17 claims
- 4098US11521927B2Buried power rail for scaled vertical transport field effect transistorIBM·Filed 2020·Granted Dec 6, 2022·4 cites·20 claims
- 4198US11227922B2Sloped epitaxy buried contactIBM·Filed 2020·Granted Jan 18, 2022·6 cites·21 claims
- 4298US11211452B1Transistor having stacked source/drain regions with formation assistance regions and multi-region wrap-around source/drain contactsIBM·Filed 2020·Granted Dec 28, 2021·7 cites·19 claims
- 4398US11211462B2Using selectively formed cap layers to form self-aligned contacts to source/drain regionsIBM·Filed 2020·Granted Dec 28, 2021·5 cites·16 claims
- 4498US11205698B2Multiple work function nanosheet transistors with inner spacer modulationIBM·Filed 2020·Granted Dec 21, 2021·6 cites·20 claims
- 4598US11177258B2Stacked nanosheet CFET with gate all around structureIBM·Filed 2020·Granted Nov 16, 2021·15 cites·20 claims
- 4698US11164793B2Reduced source/drain coupling for CFETIBM·Filed 2020·Granted Nov 2, 2021·6 cites·15 claims
- 4798US11107731B1Self-aligned repaired top viaIBM·Filed 2020·Granted Aug 31, 2021·5 cites·20 claims
- 4898US10903317B1Gate-all-around field effect transistors with robust inner spacers and methodsGLOBALFOUNDRIES US INC·Filed 2019·Granted Jan 26, 2021·24 cites·20 claims
- 4998US10840146B1Structures and SRAM bit cells with a buried cross-couple interconnectGLOBALFOUNDRIES INC·Filed 2019·Granted Nov 17, 2020·62 cites·20 claims
- 5098US10832916B1Self-aligned gate isolation with asymmetric cut placementIBM·Filed 2019·Granted Nov 10, 2020·42 cites·25 claims
Showing the top 50 of 1,874 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →