Inventor · disambiguated record
Ryan A. Fitch
Also filed as: FITCH RYAN A · FITCH RYAN ANDREW
20 granted patents·57 citations·filing 2009–2016
92Inventor score
Top patents by PatentIndex Score
20 records- 0193US8856720B2Test coverage of integrated circuits with masking pattern selectionIBM·Filed 2013·Granted Oct 7, 2014·9 cites·7 claims
- 0291US9103879B2Test coverage of integrated circuits with test vector input spreadingIBM·Filed 2013·Granted Aug 11, 2015·9 cites·5 claims
- 0390US9116205B2Test coverage of integrated circuits with test vector input spreadingIBM·Filed 2012·Granted Aug 25, 2015·8 cites·8 claims
- 0489US8667431B1Test coverage of integrated circuits with masking pattern selectionIBM·Filed 2013·Granted Mar 4, 2014·6 cites·10 claims
- 0584US8407542B2Implementing switching factor reduction in LBISTDOUSKEY STEVEN MICHAEL·Filed 2010·Granted Mar 26, 2013·8 cites·18 claims
- 0678US9032256B2Multi-core processor comparison encodingIBM·Filed 2013·Granted May 12, 2015·5 cites·19 claims
- 0774US8898530B1Dynamic built-in self-test systemIBM·Filed 2013·Granted Nov 25, 2014·4 cites·13 claims
- 0873US9746516B2Collecting diagnostic data from chipsIBM·Filed 2016·Granted Aug 29, 2017·1 cites·4 claims
- 0973US9285423B2Managing chip testing dataIBM·Filed 2013·Granted Mar 15, 2016·2 cites·15 claims
- 1073US9069041B2Self evaluation of system on a chip with multiple coresIBM·Filed 2012·Granted Jun 30, 2015·2 cites·19 claims
- 1166US9372232B2Collecting diagnostic data from chipsIBM·Filed 2013·Granted Jun 21, 2016·1 cites·4 claims
- 1266US8516318B2Dynamic scanDOUSKEY STEVEN M·Filed 2010·Granted Aug 20, 2013·2 cites·19 claims
- 1358US9366723B2Test coverage of integrated circuits with masking pattern selectionGLOBALFOUNDRIES INC·Filed 2014·Granted Jun 14, 2016·0 cites·6 claims
- 1457US9568549B2Managing redundancy repair using boundary scansIBM·Filed 2015·Granted Feb 14, 2017·0 cites·13 claims
- 1554US9188636B2Self evaluation of system on a chip with multiple coresIBM·Filed 2012·Granted Nov 17, 2015·0 cites·18 claims
- 1653US9201117B2Managing redundancy repair using boundary scansIBM·Filed 2013·Granted Dec 1, 2015·0 cites·6 claims
- 1749US7830195B2Self-test design methodology and technique for root-gated clocking structureIBM·Filed 2009·Granted Nov 9, 2010·0 cites·18 claims
- 1846US8627162B2Iimplementing enhanced aperture function calibration for logic built in self test (LBIST)DOUSKEY STEVEN M·Filed 2011·Granted Jan 7, 2014·0 cites·20 claims
- 1945US9003244B2Dynamic built-in self-test systemIBM·Filed 2013·Granted Apr 7, 2015·0 cites·8 claims
- 2044US8762803B2Implementing enhanced pseudo random pattern generators with hierarchical linear feedback shift registers (LFSRs)DOUSKEY STEVEN M·Filed 2012·Granted Jun 24, 2014·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →