Inventor · disambiguated record
Sarvesh Bhardwaj
Also filed as: BHARDWAJ SARVESH
4 granted patents·1 pending application·20 citations·filing 2006–2024
71Inventor score
Technology areasG06F
Top patents by PatentIndex Score
5 records- 0181US7630852B1Method of evaluating integrated circuit system performance using orthogonal polynomialsUNIV ARIZONA·Filed 2006·Granted Dec 8, 2009·13 cites·18 claims
- 0276US8813011B2Clock-reconvergence pessimism removal in hierarchical static timing analysisSYNOPSYS INC·Filed 2013·Granted Aug 19, 2014·4 cites·23 claims
- 0364US8434040B2Clock-reconvergence pessimism removal in hierarchical static timing analysisBHARDWAJ SARVESH·Filed 2011·Granted Apr 30, 2013·2 cites·10 claims
- 0457US8775855B2Reducing memory used to store totals in static timing analysisBHARDWAJ SARVESH·Filed 2011·Granted Jul 8, 2014·1 cites·20 claims
- 0553US2025209269A1Stateful Text Generation Using Large Language ModelsSTUDY GENIE INC·Filed 2024·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →