Inventor · disambiguated record
Sameer Chakravarthy Chillarige
Also filed as: CHILLARIGE SAMEER · CHILLARIGE SAMEER CHAKRAVARTHY
10 granted patents·45 citations·filing 2015–2022
86Inventor score
Top patents by PatentIndex Score
10 records- 0193US9400311B1Method and system of collective failure diagnosis for multiple electronic circuitsCADENCE DESIGN SYSTEMS INC·Filed 2015·Granted Jul 26, 2016·13 cites·16 claims
- 0292US9864004B1System and method for diagnosing failure locations in electronic circuitsCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jan 9, 2018·8 cites·20 claims
- 0391US11592482B1Scan channel slicing for compression-mode testing of scan chainsCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Feb 28, 2023·4 cites·20 claims
- 0482US10996270B1System and method for multiple device diagnostics and failure groupingCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted May 4, 2021·3 cites·20 claims
- 0582US10853100B1Systems and methods for creating learning-based personalized user interfacesCADENCE DESIGNS SYSTEMS INC·Filed 2018·Granted Dec 1, 2020·7 cites·20 claims
- 0682US10325048B1Virtual directory navigation and debugging across multiple test configurations in the same sessionCADENCE DESIGNS SYSTEMS INC·Filed 2016·Granted Jun 18, 2019·5 cites·12 claims
- 0780US10060976B1Method and apparatus for automatic diagnosis of mis-comparesCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Aug 28, 2018·3 cites·13 claims
- 0877US10338137B1Highly accurate defect identification and prioritization of fault locationsCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jul 2, 2019·2 cites·18 claims
- 0957US12475288B1Clock-based test-point flop sharing in a circuit designCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Nov 18, 2025·0 cites·20 claims
- 1039US10180457B1System and method performing scan chain diagnosis of an electronic designCADENCE DESIGN SYSTEMS INC·Filed 2016·Granted Jan 15, 2019·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →