Inventor · disambiguated record
Sanjeev Ghai
Also filed as: GHAI SANJEEV
65 granted patents·9 pending applications·791 citations·filing 1999–2022
99Inventor score
Top patents by PatentIndex Score
74 records- 0198US7934070B2Streaming reads for early processing in a cascaded memory subsystem with buffered memory devicesIBM·Filed 2007·Granted Apr 26, 2011·79 cites·17 claims
- 0297US7337293B2Streaming reads for early processing in a cascaded memory subsystem with buffered memory devicesIBM·Filed 2005·Granted Feb 26, 2008·69 cites·2 claims
- 0394US7467323B2Data processing system and method for efficient storage of metadata in a system memoryIBM·Filed 2005·Granted Dec 16, 2008·33 cites·10 claims
- 0493US11106608B1Synchronizing access to shared memory by extending protection for a target address of a store-conditional requestIBM·Filed 2020·Granted Aug 31, 2021·3 cites·17 claims
- 0588US9336142B2Cache configured to log addresses of high-availability data via a non-blocking channelIBM·Filed 2013·Granted May 10, 2016·9 cites·13 claims
- 0685US8930629B2Data cache block deallocate requests in a multi-level cache hierarchyIBM·Filed 2012·Granted Jan 6, 2015·7 cites·9 claims
- 0784US7130967B2Method and system for supplier-based memory speculation in a memory subsystem of a data processing systemIBM·Filed 2003·Granted Oct 31, 2006·36 cites·17 claims
- 0883US7840860B2Double DRAM bit steering for multiple error correctionsIBM·Filed 2008·Granted Nov 23, 2010·10 cites·19 claims
- 0982US9032157B2Virtual machine failoverIBM·Filed 2012·Granted May 12, 2015·5 cites·9 claims
- 1081US7523364B2Double DRAM bit steering for multiple error correctionsIBM·Filed 2005·Granted Apr 21, 2009·12 cites·1 claims
- 1179US7366844B2Data processing system and method for handling castout collisionsIBM·Filed 2005·Granted Apr 29, 2008·8 cites·16 claims
- 1278US10725937B2Synchronized access to shared memory by extending protection for a store target address of a store-conditional requestIBM·Filed 2018·Granted Jul 28, 2020·2 cites·16 claims
- 1378US7779292B2Efficient storage of metadata in a system memoryIBM·Filed 2007·Granted Aug 17, 2010·7 cites·5 claims
- 1477US6408362B1Data processing system, cache, and method that select a castout victim in response to the latencies of memory copies of cached dataIBM·Filed 1999·Granted Jun 18, 2002·76 cites·21 claims
- 1576US6282615B1Multiprocessor system bus with a data-less castout mechanismIBM·Filed 1999·Granted Aug 28, 2001·69 cites·10 claims
- 1672US10831607B2Dynamic transaction throttling in a data processing system supporting transactional memoryIBM·Filed 2018·Granted Nov 10, 2020·1 cites·20 claims
- 1771US9304936B2Bypassing a store-conditional request around a store queueIBM·Filed 2013·Granted Apr 5, 2016·2 cites·14 claims
- 1871US7058767B2Adaptive memory access speculationIBM·Filed 2003·Granted Jun 6, 2006·15 cites·23 claims
- 1970US9244724B2Management of transactional memory access requests by a cache memoryGLOBALFOUNDRIES INC·Filed 2013·Granted Jan 26, 2016·2 cites·14 claims
- 2070US9058195B2Virtual machines failoverIBM·Filed 2013·Granted Jun 16, 2015·2 cites·9 claims
- 2170US8959289B2Data cache block deallocate requestsIBM·Filed 2012·Granted Feb 17, 2015·2 cites·10 claims
- 2270US6678814B2Method and apparatus for allocating data usages within an embedded dynamic random access memory deviceIBM·Filed 2001·Granted Jan 13, 2004·15 cites·12 claims
- 2370US6405290B1Multiprocessor system bus protocol for O state memory-consistent dataIBM·Filed 1999·Granted Jun 11, 2002·55 cites·24 claims
- 2469US10140052B2Memory access in a data processing system utilizing copy and paste instructionsIBM·Filed 2016·Granted Nov 27, 2018·1 cites·18 claims
- 2568US9665297B1Injection of at least a partial cache line in a private multilevel cache hierarchyIBM·Filed 2016·Granted May 30, 2017·1 cites·20 claims
- 2668US8856455B2Data cache block deallocate requestsGHAI SANJEEV·Filed 2012·Granted Oct 7, 2014·2 cites·10 claims
- 2768US6907494B2Method and system of managing virtualized physical memory in a memory controller and processor systemIBM·Filed 2002·Granted Jun 14, 2005·13 cites·19 claims
- 2867US10152322B2Memory move instruction sequence including a stream of copy-type and paste-type instructionsIBM·Filed 2016·Granted Dec 11, 2018·1 cites·18 claims
- 2967US6970936B2Data processing system and method of communication that employ a request-and-forget protocolIBM·Filed 2000·Granted Nov 29, 2005·12 cites·18 claims
- 3067US6920521B2Method and system of managing virtualized physical memory in a data processing systemIBM·Filed 2002·Granted Jul 19, 2005·12 cites·14 claims
- 3167US6904490B2Method and system of managing virtualized physical memory in a multi-processor systemIBM·Filed 2002·Granted Jun 7, 2005·12 cites·17 claims
- 3267US6532519B2Apparatus for associating cache memories with processors within a multiprocessor data processing systemIBM·Filed 2000·Granted Mar 11, 2003·12 cites·5 claims
- 3366US9390024B2Bypassing a store-conditional request around a store queueIBM·Filed 2014·Granted Jul 12, 2016·1 cites·6 claims
- 3465US7017024B2Data processing system having no system memoryIBM·Filed 2002·Granted Mar 21, 2006·10 cites·4 claims
- 3563US11157411B2Information handling system with immediate scheduling of load operationsIBM·Filed 2019·Granted Oct 26, 2021·0 cites·20 claims
- 3663US6345341B1Method of cache management for dynamically disabling O state memory-consistent dataIBM·Filed 1999·Granted Feb 5, 2002·41 cites·24 claims
- 3762US8874852B2Data cache block deallocate requests in a multi-level cache hierarchyGHAI SANJEEV·Filed 2012·Granted Oct 28, 2014·1 cites·10 claims
- 3862US6397303B1Data processing system, cache, and method of cache management including an O state for memory-consistent cache linesIBM·Filed 1999·Granted May 28, 2002·38 cites·17 claims
- 3960US11947461B2Prefetch unit filter for microprocessorIBM·Filed 2022·Granted Apr 2, 2024·0 cites·20 claims
- 4060US8892821B2Method and system for thread-based memory speculation in a memory subsystem of a data processing systemARIMILLI RAVI KUMAR·Filed 2003·Granted Nov 18, 2014·8 cites·22 claims
- 4159US6546469B2Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopersIBM·Filed 2001·Granted Apr 8, 2003·6 cites·14 claims
- 4258US6601145B2Multiprocessor system snoop scheduling mechanism for limited bandwidth snoopers that uses dynamic hardware/software controlsIBM·Filed 2000·Granted Jul 29, 2003·5 cites·24 claims
- 4357US10489293B2Information handling system with immediate scheduling of load operationsGHAI SANJEEV·Filed 2009·Granted Nov 26, 2019·1 cites·20 claims
- 4456US10394567B2Temporarily favoring selection of store requests from one of multiple store queues for issuance to a bank of a banked cacheIBM·Filed 2017·Granted Aug 27, 2019·0 cites·7 claims
- 4556US9792208B2Techniques for logging addresses of high-availability data via a non-blocking channelIBM·Filed 2014·Granted Oct 17, 2017·0 cites·7 claims
- 4656US9471491B2Cache configured to log addresses of high-availability dataIBM·Filed 2013·Granted Oct 18, 2016·0 cites·13 claims
- 4756US9430382B2Logging addresses of high-availability dataIBM·Filed 2014·Granted Aug 30, 2016·0 cites·7 claims
- 4855US10394566B2Banked cache temporarily favoring selection of store requests from one of multiple store queuesIBM·Filed 2017·Granted Aug 27, 2019·0 cites·8 claims
- 4955US6442653B1Data processing system, cache, and method that utilize a coherency state to indicate the latency of cached dataIBM·Filed 1999·Granted Aug 27, 2002·27 cites·24 claims
- 5054US9244725B2Management of transactional memory access requests by a cache memoryGLOBALFOUNDRIES INC·Filed 2013·Granted Jan 26, 2016·0 cites·6 claims
Showing the top 50 of 74 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →