Inventor · disambiguated record
Savithri Sundareswaran
Also filed as: SUNDARESWARAN SAVITHRI
7 granted patents·63 citations·filing 2006–2014
82Inventor score
Top patents by PatentIndex Score
7 records- 0190US8656331B1Timing margins for on-chip variations from sensitivity dataSUNDARESWARAN SAVITHRI·Filed 2013·Granted Feb 18, 2014·29 cites·20 claims
- 0283US7571404B2Fast on-chip decoupling capacitance budgeting method and device for reduced power supply noiseFREESCALE SEMICONDUCTOR INC·Filed 2006·Granted Aug 4, 2009·15 cites·20 claims
- 0382US9177096B2Timing closure using transistor sizing in standard cellsSUNDARESWARAN SAVITHRI·Filed 2014·Granted Nov 3, 2015·10 cites·19 claims
- 0476US8612915B1Reducing leakage in standard cellsSUNDARESWARAN SAVITHRI·Filed 2012·Granted Dec 17, 2013·5 cites·20 claims
- 0573US9465899B2Method for provisioning decoupling capacitance in an integrated circuitFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Oct 11, 2016·4 cites·20 claims
- 0643US8618838B2Integrated circuit having a standard cell and method for formingSUNDARESWARAN SAVITHRI·Filed 2011·Granted Dec 31, 2013·0 cites·16 claims
- 0742US9264040B2Low leakage CMOS cell with low voltage swingFREESCALE SEMICONDUCTOR INC·Filed 2013·Granted Feb 16, 2016·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →